MPC855TCVR50D4 Freescale Semiconductor, MPC855TCVR50D4 Datasheet - Page 17

• Manufacturer Part Number: MPC855TCVR50D4
• Description: IC MPU POWERQUICC 50MHZ 357PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC855TCVR50D4

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Processor Series: MPC8xx
• Core: MPC8xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465/3.6V
• Operating Supply Voltage (min): 2/3.135V
• Operating Temp Range: -40C to 95C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6
This section describes the DC and AC electrical specifications for the DDR SDRAM interface of the
MPC8555E.
6.1
Table 11
MPC8555E.
Table 12
Freescale Semiconductor
I/O supply voltage
I/O reference voltage
I/O termination voltage
Input high voltage
Input low voltage
Output leakage current
Output high current (V
Output low current (V
MV
Notes:
1. GV
2. MV
3. V
4. Output leakage is measured with all outputs disabled, 0 V
Input/output capacitance: DQ, DQS, MSYNC_IN
Delta input/output capacitance: DQ, DQS
Note:
1. This parameter is sampled. GV
noise on MV
equal to MV
REF
TT
DD
REF
is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
input leakage current
DDR SDRAM
is expected to be within 50 mV of the DRAM GV
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
is expected to be equal to 0.5 × GV
provides the recommended operating conditions for the DDR SDRAM component(s) of the
provides the DDR capacitance.
DDR SDRAM DC Electrical Characteristics
Parameter/Condition
REF
REF
Parameter/Condition
. This rail should track variations in the DC level of MV
may not exceed ±2% of the DC value.
OUT
OUT
= 0.35 V)
= 1.95 V)
Table 11. DDR SDRAM DC Electrical Characteristics
DD
= 2.5 V ± 0.125 V, f = 1 MHz, T
Table 12. DDR SDRAM Capacitance
DD
, and to track GV
Symbol
MV
GV
I
VREF
V
I
V
I
V
I
OZ
OH
OL
TT
REF
IH
IL
DD
DD
Symbol
at all times.
≤
C
C
V
DIO
IO
OUT
DD
MV
MV
0.49 × GV
DC variations as measured at the receiver. Peak-to-peak
A
≤
= 25°C, V
REF
REF
GV
2.375
–15.2
–0.3
15.2
Min
–10
REF
—
DD
+ 0.18
– 0.04
.
.
DD
Min
—
6
OUT
= GV
MV
MV
0.51 × GV
GV
DD
REF
REF
2.625
DD
Max
/2, V
10
—
—
5
Max
0.5
+ 0.04
+ 0.3
– 0.18
8
OUT
DD
(peak to peak) = 0.2 V.
Unit
Unit
mA
mA
pF
pF
μA
μA
V
V
V
V
V
DDR SDRAM
Notes
Notes
—
—
—
—
—
1
1
2
1
3
4
17