MC68030FE20C Freescale Semiconductor, MC68030FE20C Datasheet - Page 232

• Manufacturer Part Number: MC68030FE20C
• Description: IC MPU 32BIT ENHANCED 132-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68030FE20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

7.4.1.2 AUTOVECTOR INTERRUPT ACKNOWLEDGE CYCLE.
MOTOROLA
I
2) SET R/'~TO REAO
3) SET FUNCTION CODE TO CPU SPACE
4) PLACE INTERRUPT LEVEL ON A1, A2, AND A3.
5) SET SIZE TO BYTE
6} NEGATE IPEND
7) ASSERT ADDRESS STROBE ( ~ ) AND DATA STROBE (O-S)
2) NEGATE AS AND OS
1) INTERRUPT PENOING (IPEND) RECOGNIZED BY CURRENT INSTRUC]!C~ -
1) LATCH VECTOR NUMBER
with DSACKx.
The vector number supplied in an autovector operation is derived from the
the sum of the interrupt level plus 24 ($18). There are seven distinct auto-
vectors that can be used, corresponding to the seven levels of interrupt
vector operation.
TYPE FIELD = INTERRUPT ACKNOWLEDGE (lACK)
erated vector or autovector. Instead of placing a vector number on the data
during an interrupt acknowledge cycle terminated by AVEC.
DSACK or STERM during an interrupt acknowledge cycle, the MC68030 ig-
nores the state of the data bus and internally generates the vector number,
available with signals IPL0-1PL2. Figure 7-45 shows the timing for an auto-
WAIT FOR INSTRUCTION BOUNDARY
Figure 7-44 shows the timing for an interrupt acknowledge cycle terminated
ing device Cannot supply a vector number, it requests an automatically gen-
bus and asserting DSACKx or STERM, the device asserts the autovector signal
(AVEC) to terminate the cycle. Neither STERM nor DSACKx may be asserted
interrupt level of the current interrupt. When AVEC is asserted instead of
DONON,E , N TERRORT EXCEPTI O N PROCESSI N G
ACKNOWIEOGE INTERRUPT
ACQUIRE VECTOR NUMBER
Figure 7-43. Interrupt Acknowledge Cycle Flowchart
PROCESSOR
MC68030 USER'S MANUAL
I
*--t
i
1) PLACE VECTOR NUMBER ON LEAST SIGNIFICANT BYTE
2) ASSERT DATA TRANSFER AND SIZE ACKNOWLEDGE (DSACKx)
2} NEGATE DSACKx
1) REMOVE VECTOR NUMBER FROM DATA BUS
OF DATA PORT (DEPENDS ON PORT SIZE)
ASSERT SYNCHRONOUS TERMINATION (STERM)
PROVIDE VECTOR INFORMATION
INTERRUPTING DEVICE
REQUESTINTERRUPT
When the interrupt-
RELEASE
- O R -
7-71
7