MC68MH360VR33L Freescale Semiconductor, MC68MH360VR33L Datasheet - Page 101

• Manufacturer Part Number: MC68MH360VR33L
• Description: IC MPU QUICC 33MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360VR33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

struct
static char *poem[6];
short linecntr;
struct intrpten {
short recvcnt,xmitcnt,othrcnt = 0;
main()
{
/* SCdP is zero from reset */
rxbdq recvbd0;
txbdq xmitbd0;
} chbd[4];
unsigned V:1;
unsigned W:1;
unsigned NID:1;
unsigned IDL:1;
unsigned :1;
unsigned CHNMBR:5;
unsigned MRF:1;
unsigned UN:1;
unsigned RXF:1;
unsigned BSY:1;
unsigned TXB:1;
unsigned RXB:1;
}
void SCC1esr();
int *pvec;
char vecblk = 3;
char intlvl = 4;
pdpr = (struct dprbase *) (getmbar() & 0xFFFFE000);/*
RAM ptr */
pdpr->CICR.VBA2_VBA0 = (unsigned) (vecblk);/* vecs at vec num 0x60-7F */
pdpr->CICR.IRL2_IRL0 = (unsigned) (intlvl);/* CPM interrupts level 4 */
pdpr->CICR.HP4_HP0 = 0x1F;
pdpr->CICR.SCcP = 1;
pdpr->CICR.SCbP = 2;
pdpr->CICR.SCaP = 3;
descs {
intrpt[10];
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Chapter 6. QMC Initialization
/* receive buffer 0 */
/* transmit buffer 0 */
/* 4 sets of chan descriptors */
/* poem area */
/* line counter */
/* entry valid bit */
/* entry wrap bit */
/* not-an-idle has occurred */
/* an idle has occurred */
/* channel number */
/* maximum frame length violation */
/* Tx underrun */
/* receive frame */
/* frame discarded, no buffers */
/* buffer transmitted */
/* receive buffer closed */
/* interrupt table */
/* interrupt counters */
/* exception service rtn */
/* exception vector pntr */
/* vector number block */
/* interrupt level */
/* no int priority change */
/* SCC2 to SCCC position */
/* SCC3 to SCCB position */
/* SCC4 to SCCA position */
init
dual-ported