MC68MH360VR33L Freescale Semiconductor, MC68MH360VR33L Datasheet - Page 105

• Manufacturer Part Number: MC68MH360VR33L
• Description: IC MPU QUICC 33MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360VR33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 33MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

}
#pragma interrupt()
void SCC1esr()
{
/* SCCE1 is cleared from reset */
poem[3] = "Couldn't put Humpty together again\n\r";
poem[4] = "";
poem[5] = "";
linecntr = 0;
for (linecntr = 0; linecntr < 4; linecntr++)
{
pointer */
init xmit cnt */
}
for (v1 = 0; v1 < 3; v1++)
{
}
pdpr->SCCM1 = 0xF;
pdpr->CIMR.SCC1 = 1;
pdpr->GSMR_L1.ENR = 1;
pdpr->GSMR_L1.ENT = 1;
while (pdpr->GSMR_L1.ENR == 1 | pdpr->GSMR_L1.ENT == 1)
asm (" stop #$2000");
short er;
asm(" move.w #$2300,sr");
er = pdpr->SCCE1;
pdpr->SCCE1 = er;
if ((er & 8) == 8)
chbd[linecntr].xmitbd0.txbdptr = poem[linecntr];/*
chbd[linecntr].xmitbd0.txbdcnt = strlen(poem[linecntr]) + 1;/*
chbd[linecntr].xmitbd0.txbdsac.R = 1;/* set xmit in BD */
pdpr->ch[v1].CHAMR.MODE = 1;
pdpr->ch[v1].CHAMR.IDLM = 0;
pdpr->ch[v1].CHAMR.ENT = 1;
pdpr->ch[v1].CHAMR.CRC = 1;
pdpr->ch[v1].CHAMR.NOF = 7;
pdpr->ch[v1].CHAMR.POL = 1;
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Chapter 6. QMC Initialization
/* init line counter */
/* enable all intrpts */
/* SCC1 interrupts enabled */
/* enable receiver */
/* enable transmit */
/* stop for next interrupt */
/* make function an exception sr */
/* SCC1 exception service rtn */
/* event register scratchpad loc */
/* decrement interrupt mask level */
/* init event register scratchpad */
/* clear event register */
/* if interrupt table overflow */
/* select HDLC */
/* no idles between frames */
/* enable channel xmit */
/* select 32-bit CRC */
/* 7 flags between frames */
/* enable polling by RISC */
init
xmit