MC68030RC33C Freescale Semiconductor, MC68030RC33C Datasheet - Page 411

• Manufacturer Part Number: MC68030RC33C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC33C

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

10
10.2.3.2.4 Valid Format Word.
10.2.3.3 COPROCESSOR CONTEXT SAVE INSTRUCTION.
10.2.3.3.1 Format.
10-24
word. During the cpRESTORE instruction, the main processor uses the length
the abort mask (refer to 10.2.3.2.3 Invalid Format Word to the control CIR
A coprocessor should usually not place an invalid format word in the save
while it is executing a previously initiated cpSAVE or cpRESTORE instruction.
the main processor reads the save CIR to initiate the cpSAVE instruction
while either another cpSAVE or cpRESTORE instruction is executing. If the
word from the save CIR during the cpSAVE instruction, it uses the length
field to determine the size of the coprocessor state frame to save. The length
field in the lower eight bits of a format word is relevant only in a valid format
field in the format word read from the effective address in the instruction to
determine the size of the coprocessor state frame to restore.
The length field of a valid format word, representing the size of the copro-
cessor state frame, must contain a multiple of four. If the main processor
detects a value that is not a multiple of four in a length field during the
execution of a cpSAVE or cpRESTORE instruction, the main processor writes
and initiates format error exception processing.
sor context save instruction category consists of one instruction. The copro-
cessor context save instruction, denoted by the cpSAVE mnemonic, saves
the context of a coprocessor dynamically without relation to the execution
gories. During the execution of a cpSAVE instruction, the coprocessor com-
format codes.
first word of the instruction is the F-line operation word, which contains the
CIR when the main processor initiates a cpSAVE instruction. A coprocessor,
however, may not be able to support the initiation of a cpSAVE instruction
In this situation, the coprocessor can return the invalid format word when
main processor reads an invalid format word from the save CIR, it writes the
abort mask to the control CIR and initiates format error exception processing
(refer to 10.5,1.5 FORMAT ERRORS).
of coprocessor instructions in the general or conditional instruction cate-
municates status information to the main processor by using the coprocessor
coprocessor identification code in bits [9-11] and an M68000 effective address
Figure 10-15 shows the format of the cpSAVE instruction. The
MC68030 USER'S MANUAL
When the main processor reads a valid format
The M68000 coproces-
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