MC68030RC33C Freescale Semiconductor, MC68030RC33C Datasheet - Page 559

• Manufacturer Part Number: MC68030RC33C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC33C

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

12
12-34
to suppress early termination may be included as required by a particular
the output of (C) be valid before the rising edge of state $1 (see Equation
The late termination circuit is formed by the gates (D) and (E). If the current
to delay propagation of this output by the required number of clock periods.
cycles with CIOU-I = asserted, and all cycles that missed in the cache on the
in (C) latches the termination condition of the current bus cycle at the rising
edge of AS, and this status is used during the next cycle. Other conditions
system, but propagation delays must be carefully considered in order that
cycle is accessing a cachable location, as determined by the output of (C),
and a cache hit has not occurred (D), then the BERR and HALT signals are
driven low (E).
operating with no wait states. A provision for generating wait states may be
included by placing additional timing stages between (C) and the MC68030
previous cycle and were not accesses to noncachable locations. The flip-flop
12-3 of Table 12-2).
Note that the logic depicted in Figure 12-18 is designed to support a cache
IACTIVE HIGH)
(ACTIVE HIGH)
CACHE HIT
CACHE HIT
CLOUT
- -
R/W
FC2
FC1
ECO -
AS
Figure 12-18. Example Early Termination Control Circuit
-
~
)0
CPUSPACE
MC68030 USER'S MANUAL
7
I
I
I
STERM
,
i
I
I
I
I
I
L
I
,
®j
MOTOROLA
l
I
I
H-EC