MC68030RC33C Freescale Semiconductor, MC68030RC33C Datasheet - Page 500

• Manufacturer Part Number: MC68030RC33C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC33C

• Processor Type: M680x0 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

M O T O R O L A
11.6.6 M O V E Instruction
table is needed on most MOVE operations (source, destination dependent).
All timing data assumes two-clock reads and writes.
The MOVE instruction timing table indicates the number of clock periods
The destination effective addresses are divided by their formats (refer to 2.5
The number of read, prefetch, and write cycles is given inside the parentheses
as (r/p/w). The read, prefetch, and write cycles are included in the total clock
cycle number.
I
I
needed for the processor to calculate the destination effective address and
perform the MOVE or MOVEA instruction, including the first level of indi-
rection on memory indirect addressing modes. The fetch effective address
Effective Address Encoding Summary). For instruction-cache case and for
no-cache case, the total number of clock cycles is outside the parentheses.
SINGLE EFFECTIVE ADDRESS INSTRUCTION FORMAT
* MOVE SOURCE, (An)
* MOVE EA,An
* MOVE EA, Dn
* MOVE SOURCE, (An)+
* MOVE SOURCE, -(An)
* MOVE EA, (d16,An)
* MOVE EA,XXX.W
* MOVE EA,XXX.L
BRIEF FORMAT EXTENSION WORD
* MOVE EA, (d8,An,Xn)
MOVE Rn,(An)
MOVE Rn, Dn
MOVE Rn, An
MOVE Rn,(An) +
MOVE Rn,- (An)
MOVESou,oe,D.,i°atio°
MC68030 USER'S M A N U A L
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2
2
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2
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4(0/0/1)
2(0/0/0)
2(0/0/0)
2(0/0/0)
2(0/0/0)
3(0/0/1)
3(0/0/1)
4(0/0/1)
4(0/0/1)
4(0/0/1)
4(0/0/1)
4(0/0/1)
6(0/0/1)
6(0/0/1)
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5(0/1/I)
5(0/1/1)
5(0/1/1)
5(0/1.1)
7(0/2.'1)
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4(0/1/1)
4(0/1/1)
4(0/1/1)
2(0/1/0)
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2(0/1/0)
2(0/1/0)
5(o/1.'1)
11-37
11