DS21FF44 Maxim Integrated Products, DS21FF44 Datasheet - Page 24
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DS21FF44
Manufacturer Part Number
DS21FF44
Description
IC FRAMER E1 4X4 16CH 300-BGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21FT44N.pdf
(117 pages)
Specifications of DS21FF44
Controller Type
E1 Framer
Interface
Parallel/Serial
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
300mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
300-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Signal Name:
Signal Description:
Signal Type:
Sampled on the falling edge of RCLK for data to be clocked through the receive side framer. RPOS and
RNEG can be connected together for an NRZ interface. Connecting RPOS to RNEG disables the bipolar
violation monitoring circuitry.
PARALLEL CONTROL PORT PINS
Signal Name:
Signal Description:
Signal Type:
Flags host controller during conditions and change of conditions defined in the Status Registers 1 and 2
and the FDL Status Register. Active-low, open-drain output.
Signal Name:
Signal Description:
Signal Type:
Set low to select DS21Q44 feature set. Set high to select DS21Q43 emulation. FMS is connected to
ground for the DS21FF44/DS21FT44.
Signal Name:
Signal Description:
Signal Type:
Set low to select nonmultiplexed bus operation. Set high to select multiplexed bus operation.
Signal Name:
Signal Description:
Signal Type:
In nonmultiplexed bus operation (MUX = 0), serves as the data bus. In multiplexed bus operation
(MUX = 1), serves as an 8-bit multiplexed address/data bus.
Signal Name:
Signal Description:
Signal Type:
In nonmultiplexed bus operation (MUX = 0), serves as the address bus. In multiplexed bus operation
(MUX = 1), these pins are not used and should be connected low.
Signal Name:
Signal Description:
Signal Type:
In nonmultiplexed bus operation (MUX = 0), serves as address bit 6. In multiplexed bus operation
(MUX = 1), serves to demultiplex the bus on a positive-going edge.
Signal Name:
Signal Description:
Signal Type:
Strap high to select Motorola bus timing; strap low to select Intel bus timing. This pin controls the
function of the RD*(DS*), ALE(AS), and WR*(R/W*) pins. If BTS = 1, then these pins assume the
function listed in parenthesis ().
RNEG
Receive Negative Data Input
Input
INT*
Interrupt
Output
FMS
Framer Mode Select
Input
MUX
Bus Operation
Input
D0 to D7 / AD0 to AD7
Data Bus or Address/Data Bus
Input /Output
A0 to A5, A7
Address Bus
Input
ALE (AS) / A6
Address Latch Enable (Address Strobe) or A6
Input
BTS
Bus Type Select
Input
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