CY7C68001-56LTXC Cypress Semiconductor Corp, CY7C68001-56LTXC Datasheet - Page 25

• Manufacturer Part Number: CY7C68001-56LTXC
• Description: IC USB EZ-USB SX2 HS 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr
• Type: USBr

Specifications of CY7C68001-56LTXC

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2932

Table 7-3. Endpoint Type
7.5.4
0 = 512 bytes (default), 1 = 1024 bytes.
Endpoints 4 and 8 can only be 512 bytes. The size of endpoints 2 and 6 is selectable.
7.5.5
Each bulk endpoint (IN or OUT) has a STALL bit (bit 2). If the external master sets this bit, any requests to the endpoint return a
STALL handshake rather than ACK or NAK. The Get Status-Endpoint Request returns the STALL state for the endpoint indicated
in byte 4 of the request. Note that bit 7 of the endpoint number EP (byte 4) specifies direction.
7.5.6
The depth of endpoint buffering is selected via BUF1:0, as shown in Table 7-4.
Table 7-4. Endpoint Buffering
7.6
The external master can use these registers to set smaller packet sizes than the physical buffer size (refer to the previously
described EPxCFG registers). The default packet size is 512 bytes for all endpoints. Note that EP2 and EP6 can have maximum
sizes of 1024 bytes, and EP4 and EP8 can have maximum sizes of 512 bytes, to be consistent with the endpoint structure.
In addition, the EPxPKTLENH register has four other endpoint configuration bits.
Document #: 38-08013 Rev. *B
EPxPKTLENL
Bit #
Bit Name
Read/Write
Reset
EP2PKTLENH, EP6PKTLENH
Bit #
Bit Name
Read/Write
Reset
EP4PKTLENH, EP8PKTLENH
Bit #
Bit Name
Read/Write
Reset
Bit 3: SIZE
Bit 2: STALL
Bit [1,0]: BUF1, BUF0
EPxPKTLENH/L Registers 0x0A–0x11
TYPE1
0
0
1
1
BUF1
INFM1
INFM1
0
0
1
1
PL7
R/W
R/W
R/W
7
0
7
0
7
0
OEP1
OEP1
R/W
R/W
R/W
PL6
6
0
6
0
6
0
TYPE0
ZEROLEN
ZEROLEN
R/W
R/W
R/W
PL5
0
1
0
1
5
0
5
1
5
1
BUF0
0
1
0
1
WORDWIDE
WORDWIDE
R/W
R/W
R/W
PL4
4
0
4
1
4
1
R/W
R/W
R/W
PL3
3
0
3
0
3
0
0
0
Endpoint Type
Bulk (Default)
Isochronous
PL10
R/W
R/W
R/W
PL2
2
0
2
0
2
0
0
Interrupt
Invalid
Buffering
Double
Invalid
Quad
Triple
R/W
R/W
R/W
PL1
PL9
PL9
1
0
1
1
1
1
CY7C68001
0x0B, 0x0D, 0x0F, 0x11
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0x0A, 0x0E
0x0C, 0x10
R/W
R/W
R/W
PL0
PL8
PL8
0
0
0
0
0
0