CY7C68001-56LTXC Cypress Semiconductor Corp, CY7C68001-56LTXC Datasheet - Page 30

• Manufacturer Part Number: CY7C68001-56LTXC
• Description: IC USB EZ-USB SX2 HS 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr
• Type: USBr

Specifications of CY7C68001-56LTXC

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2932

7.15
This register address is used to write the 500-byte descriptor RAM. The external master writes two bytes (four command data
transfers) to this address corresponding to the length of the descriptor or VID/PID/DID data to be written. The external master
then consecutively writes that number of bytes into the descriptor RAM in nibble format. For complete details, refer to Section 4.0.
7.16
This register address is used to access the 64-byte Endpoint 0 buffer. The external master can read or write to this register to
complete Endpoint 0 data transfers. For complete details, refer to Section 5.0.
7.17
This register address is used to access the 8-byte set-up packet received from the USB host. If the external master writes to this
register, it can stall Endpoint 0. For complete details, refer to Section 5.0.
7.18
This register address is used to access the byte count of Endpoint 0. For Endpoint 0 OUT transfers, the external master can read
this register to get the number of bytes transferred from the USB host. For Endpoint 0 IN transfers, the external master writes the
number of bytes in the Endpoint 0 buffer to transfer the bytes to the USB host. For complete details, refer to Section 5.0.
Document #: 38-08013 Rev. *B
DESC Register 0x30
EP0BUF Register 0x31
SETUP Register 0x32
EP0BC Register 0x33
CY7C68001
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