PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 126

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PIC16F785-I/P

Manufacturer Part Number
PIC16F785-I/P
Description
MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F785-I/P

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
17
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
PIC16F785/HV785
FIGURE 15-10:
15.7
If
programmed, the on-chip program memory can be
read out using ICSP
15.8
Four memory locations (2000h-2003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
not accessible during normal execution, but are
readable and writable during Program/Verify. Only the
Least Significant 7 bits of the ID locations are used.
15.9
The PIC16F785/HV785 microcontrollers can be seri-
ally programmed while in the end application circuit.
This is simply done with five lines:
• Clock
• Data
• Power
• Ground
• Programming voltage
DS41249D-page 124
INSTRUCTION FLOW
(INTCON<7>)
(INTCON<1>)
Note
Note:
CLKOUT
Instruction
Instruction
the
Executed
Fetched
INTF flag
INT pin
GIE bit
OSC1
1:
2:
3:
4:
Code Protection
ID Locations
In-Circuit Serial Programming™
(ICSP™)
code
PC
(4)
If the code protection is turned off, the
entire data EEPROM and Flash program
memory will be erased by performing a
bulk
“PIC16F785/HV785 Memory Program-
ming Specification” (DS41237) for more
information.
XT, HS or LP Oscillator mode assumed.
T
(see Section 3.6 “Two-Speed Clock Start-up Mode”).
GIE = 1 assumed. In this case after wake-up, the processor jumps to 0004h.
If GIE = 0, execution will continue in-line.
CLKOUT is not available in XT, HS, LP or EC Oscillator modes, but shown here for timing reference.
OST
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
Inst(PC) = Sleep
protection
Inst(PC - 1)
= 1024T
PC
erase
WAKE-UP FROM SLEEP THROUGH INTERRUPT
for verification purposes.
OSC
(drawing not to scale). This delay does not apply to EC, RC and INTOSC Oscillator modes or Two-Speed Start-up
command.
bit(s)
Inst(PC + 1)
Sleep
PC + 1
have
See
Processor
not
in Sleep
PC + 2
been
the
Preliminary
T
OST (2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Interrupt Latency
Inst(PC + 2)
Inst(PC + 1)
This allows customers to manufacture boards with
unprogrammed devices and then program the micro-
controller just before shipping the product. This also
allows the most recent firmware, or a custom firmware,
to be programmed.
The device is placed into a Program/Verify mode by
holding the RA0 and RA1 pins low, while raising the
MCLR (V
HV785
(DS41237) for more information. RA0 becomes the
programming data and RA1 becomes the programming
clock. Both RA0 and RA1 are Schmitt Trigger inputs in
this mode.
After Reset, to place the device into Program/Verify
mode, the Program Counter (PC) is at location 00h. A
6-bit command is then supplied to the device.
Depending on the command, 14 bits of program data
are then supplied to or from the device, depending on
whether the command was a load or a read. For
complete details of serial programming, please refer to
the “PIC16F785/HV785 Memory Programming Speci-
fication” (DS41237).
A typical In-Circuit Serial Programming connection is
shown in Figure 15-11.
PC + 2
PP
Memory
(3)
Dummy cycle
) pin from V
PC + 2
(1)
IL
Programming
© 2006 Microchip Technology Inc.
to V
Inst(0004h)
Dummy cycle
0004h
IHH
. See the “PIC16F785/
Inst(0005h)
Inst(0004h)
Specification”
0005h

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