PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 163
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PIC16F785-I/P
Manufacturer Part Number
PIC16F785-I/P
Description
MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F785-IP.pdf
(184 pages)
Specifications of PIC16F785-I/P
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
17
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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FIGURE 19-9:
TABLE 19-16: PIC16F785/HV785 A/D CONVERSION REQUIREMENTS
© 2006 Microchip Technology Inc.
130
130
131
132
134
Note 1:
Param
No.
Note 1:
A/D DATA
2:
SAMPLE
A/D CLK
*
†
BSF ADCON0, GO
ADRES
T
T
T
T
T
ADIF
AD
AD
CNV
ACQ
These parameters are characterized but not tested.
Data in ‘Typ’ column is at 5.0V, 25 C unless otherwise stated. These parameters are for design guidance only and are
not tested.
ADRESH and ADRESL registers may be read on the following T
See Section 12.2 “A/D Acquisition Requirements” for minimum conditions.
Sym
GO
GO
Q4
If the A/D clock source is selected as RC, a time of T
SLEEP instruction to be executed.
134
A/D Clock Period
A/D Internal RC
Oscillator Period
Conversion Time (not
including
Acquisition Time)
Acquisition Time
Q4 to A/D Clock Start
132
Characteristic
PIC16F785/HV785 A/D CONVERSION TIMING (NORMAL MODE)
(1)
(T
OSC
/2)
(Note 2)
(1)
3.0*
3.0*
2.0*
Min
9
1.6
—
5*
—
OLD_DATA
8
Preliminary
T
Typ†
OSC
11.5
6.0
4.0
—
—
11
—
SAMPLING STOPPED
131
7
/2
CY
6
is added before the A/D clock starts. This allows the
Max
130
9.0*
6.0*
—
—
—
—
—
—
CY
3
PIC16F785/HV785
cycle.
Units
T
—
AD
s
s
s
s
s
s
2
T
T
ADCS<1:0> = 11 (RC mode)
At V
At V
Set GO bit to new data in A/D result
register
The minimum time is the amplifier settling
time. This may be used if the “new” input
voltage has not changed by more than 1
LSb (i.e., 4.1 mV @ 4.096V) from the last
sampled voltage (as stored on C
If the A/D clock source is selected as
RC, a time of T
A/D clock starts. This allows the SLEEP
instruction to be executed.
OSC
OSC
1
DD
DD
-based, V
-based, V
= 2.5V
= 5.0V
0
Conditions
REF
REF
CY
is added before the
NEW_DATA
full range
DS41249D-page 161
DONE
1 T
3.0V
CY
1 T
CY
HOLD
).
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