PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 132
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PIC16F785-I/P
Manufacturer Part Number
PIC16F785-I/P
Description
MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F785-IP.pdf
(184 pages)
Specifications of PIC16F785-I/P
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
17
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC16F785/HV785
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Description:
CALL
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS41249D-page 130
Bit Test f, Skip if Clear
[label] BTFSC f,b
0
0
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘1’, the next
instruction is executed.
If bit ‘b’, in register ‘f’, is ‘0’, the
next instruction is discarded, and
a NOP is executed instead, making
this a two-cycle instruction.
Bit Test f, Skip if Set
[label] BTFSS f,b
0
0
skip if (f<b>) = 1
None
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is executed.
If bit ‘b’ is ‘1’, then the next instruc-
tion is discarded and a NOP is
executed instead, making this a
two-cycle instruction.
Call Subroutine
[ label ] CALL k
0
(PC)+ 1
k
(PCLATH<4:3>)
None
Call Subroutine. First, return
address (PC + 1) is pushed onto
the stack. The eleven-bit immedi-
ate address is loaded into PC bits
<10:0>. The upper bits of the PC
are loaded from PCLATH. CALL
is a two-cycle instruction.
f
b
f
b < 7
k
PC<10:0>,
127
127
7
2047
TOS,
PC<12:11>
Preliminary
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Description:
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Description:
Clear W
[ label ] CLRW
None
00h
1
Z
W register is cleared. Zero bit (Z)
is set.
Clear Watchdog Timer
[ label ] CLRWDT
None
00h
0
1
1
TO, PD
CLRWDT instruction resets the
Watchdog Timer. It also resets the
prescaler of the WDT.
Status bits TO and PD are set.
Clear f
[label] CLRF
0
00h
1
Z
The contents of register ‘f’ are
cleared and the Z bit is set.
f
Z
WDT prescaler,
TO
PD
© 2006 Microchip Technology Inc.
Z
127
(W)
WDT
(f)
f
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