PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 35

• Manufacturer Part Number: PIC16F785-I/P
• Description: MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F785-I/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 17
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 3-2:
TABLE 3-4:
© 2006 Microchip Technology Inc.
0Ch
8Ch
8Fh
90h
2007h
Legend:
Note
Address
(1)
1:
PIR1
PIE1
OSCCON
OSCTUNE
CONFIG
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
x = unknown, u = unchanged, – = unimplemented locations read as ‘0’, q = value depends on condition. Shaded cells are not used by
oscillators.
See Register 15-1 for operation of all Configuration Word bits.
Name
SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
OSCCON: OSCILLATOR CONTROL REGISTER (ADDRESS: 8Fh)
Unimplemented: Read as ‘0’
IRCF<2:0>: Internal Oscillator Frequency Select bits
000 = 31 kHz
001 = 125 kHz
010 = 250 kHz
011 = 500 kHz
100 = 1 MHz
101 = 2 MHz
110 = 4 MHz
111 = 8 MHz
OSTS: Oscillator Start-up Time-out Status bit
1 = Device is running from the external system clock defined by FOSC<2:0>
0 = Device is running from the internal system clock (HFINTOSC or LFINTOSC)
HTS: HFINTOSC (High Frequency – 8 MHz to 125 kHz) Status bit
1 = HFINTOSC is stable
0 = HFINTOSC is not stable
LTS: LFINTOSC (Low Frequency – 31 kHz) Stable bit
1 = LFINTOSC is stable
0 = LFINTOSC is not stable
SCS: System Clock Select bit
1 = Internal oscillator is used for system clock
0 = Clock source defined by FOSC<2:0>
bit 7
Legend:
R = Readable bit
-n = Value at POR
Bit 7
EEIF
EEIE
CPD
—
—
Note 1: Bit resets to ‘0’ with Two-Speed Start-up and LP, XT or HS selected as the Oscillator
U-0
—
IRCF2
Bit 6
ADIF
ADIE
CP
—
mode or Fail-Safe mode is enabled, otherwise this bit resets to ‘1’.
R/W-1
IRCF2
CCP1IF
CCP1IE
MCLRE
IRCF1
Bit 5
—
R/W-1
IRCF1
PWRTE
IRCF0
TUN4
Bit 4
C2IF
C2IE
Preliminary
W = Writable bit
‘1’ = Bit is set
q = value depends on condition
WDTE
OSTS
Bit 3
TUN3
C1IF
C1IE
R/W-0
IRCF0
FOSC2
OSFIF
OSFIE
TUN2
Bit 2
(1)
HTS
PIC16F785/HV785
OSTS
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-q
TMR2IE
TMR2IF
FOSC1
TUN1
Bit 1
LTS
(1)
TMR1IF
TMR1IE
FOSC0
TUN0
Bit 0
HTS
SCS
R-0
POR, BOR
0000 0000
0000 0000
-110 q000
---0 0000
Value on:
x = Bit is unknown
—
LTS
R-0
DS41249D-page 33
Value on all
0000 0000
0000 0000
-110 q000
---u uuuu
Resets
other
R/W-0
SCS
—
bit 0