PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 19

• Manufacturer Part Number: PIC16F785-I/P
• Description: MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F785-I/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 17
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

2.2.2.3
The Interrupt Control register is a readable and writable
register, which contains the various enable and flag bits
for TMR0 register overflow, PORTA change and external
RA2/INT pin interrupts.
REGISTER 2-3:
© 2006 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON Register
INTCON: INTERRUPT CONTROL REGISTER (ADDRESS: 0Bh, 8Bh, 10Bh OR
183h)
bit 7
GIE: Global Interrupt Enable bit
1 = Enables all unmasked interrupts
0 = Disables all interrupts
PEIE: Peripheral Interrupt Enable bit
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
T0IE: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
INTE: RA2/AN2/T0CKI/INT/C1OUT External Interrupt Enable bit
1 = Enables the RA2/AN2/T0CKI/INT/C1OUT external interrupt
0 = Disables the RA2/AN2/T0CKI/INT/C1OUT external interrupt
RAIE: PORTA Change Interrupt Enable bit
1 = Enables the PORTA change interrupt
0 = Disables the PORTA change interrupt
T0IF: TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INTF: RA2/AN2/T0CKI/INT/C1OUT External Interrupt Flag bit
1 = The RA2/AN2/T0CKI/INT/C1OUT external interrupt occurred (must be cleared in software)
0 = The RA2/AN2/T0CKI/INT/C1OUT external interrupt did not occur
RAIF: PORTA Change Interrupt Flag bit
1 = When at least one of the PORTA <5:0> pins changed state (must be cleared in software)
0 = None of the PORTA <5:0> pins have changed state
Legend:
R = Readable bit
-n = Value at POR
R/W-0
Note 1: IOCA register must also be enabled.
GIE
2: T0IF bit is set when Timer0 rolls over. Timer0 is unchanged on Reset and should
be initialized before clearing T0IF bit.
R/W-0
PEIE
R/W-0
T0IE
Preliminary
W = Writable bit
‘1’ = Bit is set
R/W-0
INTE
(2)
Note:
(1)
PIC16F785/HV785
RAIE
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User
software should ensure the appropriate
interrupt flag bits are clear prior to
enabling an interrupt.
(1)
T0IF
R/W-0
(2)
x = Bit is unknown
R/W-0
INTF
DS41249D-page 17
R/W-0
RAIF
bit 0