PIC16F785-I/P Microchip Technology Inc., PIC16F785-I/P Datasheet - Page 44

• Manufacturer Part Number: PIC16F785-I/P
• Description: MCU, 8-Bit, 2KW Flash, 128 RAM, 18 I/O, DIP-20
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F785-I/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 17
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F785/HV785
4.3
PORTB is a 4-bit wide, bidirectional port. The corre-
sponding data direction register is TRISB (Register 4-
6). Setting a TRISB bit (= 1) will make the correspond-
ing PORTB pin an input (i.e., put the corresponding
output driver in a High-Impedance mode). Clearing a
TRISB bit (= 0) will make the corresponding PORTB
pin an output (i.e., put the contents of the output latch
on the selected pin). Example 4-2 shows how to initial-
ize PORTB.
Reading the PORTB register (Register 4-5) reads the
status of the pins, whereas writing to it will write to the
port latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then writ-
ten to the port data latch.
Pin RB6 is an open drain output. All other PORTB pins
have full CMOS output drivers.
REGISTER 4-5:
REGISTER 4-6:
DS41249D-page 42
PORTB and TRISB Registers
bit 7-4
bit 3-0
bit 7-4
bit 3-0
PORTB: PORTB REGISTER (ADDRESS: 06h, 106h)
TRISB: PORTB TRI-STATE REGISTER (ADDRESS: 86h, 186h)
RB<7:4>: PORTB General Purpose I/O Pin bits
1 = Port pin is greater than V
0 = Port pin is less than V
Unimplemented: Read as ‘0’
bit 7
TRISB<7:4>: PORTB Tri-State Control bits
1 = PORTB pin configured as an input (tri-stated)
0 = PORTB pin configured as an output
Unimplemented: Read as ‘0’
bit 7
Legend:
R = Readable bit
-n = Value at POR
Legend:
R = Readable bit
-n = Value at POR
TRISB7
R/W-1
R/W-x
Note 1: Data latches are unknown after a POR, but each port bit reads ‘0’ when the
RB7
corresponding analog select bit is ‘1’ (see Register 12-2 on page 82).
TRISB6
R/W-1
R/W-x
RB6
IL
R/W-x
TRISB5
R/W-1
RB5
Preliminary
IH
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
(1)
R/W-x
TRISB4
R/W-1
RB4
The TRISB register controls the direction of the
PORTB pins, even when they are being used as ana-
log inputs. The user must ensure the bits in the TRISB
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
EXAMPLE 4-2:
BCF
BCF
CLRF
BSF
BCF
BCF
MOVLW
MOVWF
BCF
Note:
(1)
STATUS,RP0
STATUS,RP1
PORTB
STATUS,RP0
ANSEL1,2
ANSEL1,3
30h
TRISB
STATUS,RP0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
The ANSEL1 (93h) register must be initial-
ized to configure an analog channel as a
digital input. Pins configured as analog
inputs will read ‘0’.
—
—
INITIALIZING PORTB
U-0
U-0
—
—
© 2006 Microchip Technology Inc.
;Bank 0
;
;Init PORTB
;Bank 1
;digital I/O - RB4
;digital I/O - RB5
;Set RB<5:4> as inputs
;and set RB<7:6>
;as outputs
;Bank 0
x = Bit is unknown
x = Bit is unknown
U-0
U-0
—
—
U-0
U-0
—
—
bit 0
bit 0