SAA7115HL/V1,518 NXP Semiconductors, SAA7115HL/V1,518 Datasheet - Page 323

• Manufacturer Part Number: SAA7115HL/V1,518
• Description: IC DIGITAL VIDEO DECODER 100LQFP
• Manufacturer: NXP Semiconductors
• Type: Video Decoderr

Specifications of SAA7115HL/V1,518

• Package / Case: 100-LQFP
• Applications: Set-Top Boxes
• Mounting Type: Surface Mount
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Voltage - Supply, Digital: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935270666518; SAA7115HLBE-T; SAA7115HLBE-T

PNX1300/01/02/11 Data Book
dspidualabs
SYNTAX
FUNCTION
DESCRIPTION
a constant zero as first argument and the
cannot be used in assembly source files.)
high and low 16-bit halfwords of rsrc1. Both absolute values are clipped into the range [0x0..0x7fff] and written into the
corresponding halfwords of rdest. All values are signed 16-bit integers.
the modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
A-25
r30 = 0xffff0032
r10 = 0, r40 = 0x80008001
r20 = 1, r40 = 0x80008001
r50 = 0x0032ffff
r90 = 0x7fffffff
The
The
The
[ IF rguard ] dspidualabs rsrc1 → rdest
if rguard then {
}
temp1 ← sign_ext16to32(rsrc1<15:0>)
temp2 ← sign_ext16to32(rsrc1<31:16>)
if temp1 = 0xffff8000 then temp1 ← 0x7fff
if temp2 = 0xffff8000 then temp2 ← 0x7fff
if temp1 < 0 then temp1 ← –temp1
if temp2 < 0 then temp2 ← –temp2
rdest<31:16> ← temp2<15:0>
rdest<15:0> ← temp1<15:0>
dspidualabs
dspidualabs
dspidualabs
Initial Values
PRELIMINARY SPECIFICATION
operation is a pseudo operation transformed by the scheduler into an h_
operation performs two 16-bit clipped, signed absolute value computations separately on the
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls
dspidualabs r30 → r60
IF r10 dspidualabs r40 → r70
IF r20 dspidualabs r40 → r100
dspidualabs r50 → r80
dspidualabs r90 → r110
dspidualabs
Dual clipped absolute value of signed 16-bit
Operation
argument as second argument. (Note: pseudo operations
pseudo-op for h_dspidualabs
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r60 ← 0x00010032
no change, since guard is false
r100 ← 0x7fff7fff
r80 ← 0x00320001
r110 ← 0x7fff0001
dspidualadd dspidualmul
h_dspidualabs dspiabs
Philips Semiconductors
dspidualsub
ATTRIBUTES
SEE ALSO
dspidualabs
Result
halfwords
dspalu
1, 3
No
72
—
1
2
with