SAA7115HL/V1,518 NXP Semiconductors, SAA7115HL/V1,518 Datasheet - Page 471
![IC DIGITAL VIDEO DECODER 100LQFP](/photos/6/65/66516/568-100-lqfp_sot407-1_sml.jpg)
SAA7115HL/V1,518
Manufacturer Part Number
SAA7115HL/V1,518
Description
IC DIGITAL VIDEO DECODER 100LQFP
Manufacturer
NXP Semiconductors
Type
Video Decoderr
Specifications of SAA7115HL/V1,518
Package / Case
100-LQFP
Applications
Set-Top Boxes
Mounting Type
Surface Mount
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-
Voltage - Supply, Digital
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935270666518
SAA7115HLBE-T
SAA7115HLBE-T
SAA7115HLBE-T
SAA7115HLBE-T
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SAA7115HL/V1,518
Manufacturer:
Sigma Designs Inc
Quantity:
10 000
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PNX1300/01/02/11 Data Book
ufir16
SYNTAX
FUNCTION
DESCRIPTION
halfwords of rsrc1 and rsrc2; the two products are summed, and the result is written to rdest. All halfwords are
considered unsigned; thus, the intermediate products and the final sum of products are unsigned. All intermediate
computations are performed without loss of precision; the final sum of products is clipped into the range [0xffffffff..0]
before being written into rdest.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
A-173
r30 = 0x00020003, r40 = 0x00010002
r10 = 0, r60 = 0x80000064, r70 = 0x00648000
r20 = 1, r60 = 0x80000064, r70 = 0x00648000
r30 = 0x00020003, r70 = 0x00648000
As shown below, the
The
[ IF rguard ] ufir16 rsrc1 rsrc2 → rdest
if rguard then
rsrc1
rdest ← zero_ext16to32(rsrc1<31:16>) × zero_ext16to32(rsrc2<31:16>) +
ufir16
31
zero_ext16to32(rsrc1<15:0>) × zero_ext16to32(rsrc2<15:0>)
unsigned
Initial Values
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
PRELIMINARY SPECIFICATION
ufir16
Full-precision
33-bit result
15
rdest
operation computes two separate products of the two pairs of corresponding 16-bit
32
31
unsigned
Sum of products of unsigned 16-bit halfwords
ufir16 r30 r40 → r50
IF r10 ufir16 r60 r70 → r80
IF r20 ufir16 r60 r70 → r90
ufir16 r30 r70 → r100
0
Clip to [2
unsigned
unsigned
32
Operation
–1..0]
rsrc2
31
unsigned
×
0
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ifir16 ifir8ii ifir8ui
r50 ← 8
no change, since guard is false
r90 ← 0x00640000
r100 ← 0x000180c8
+
Philips Semiconductors
15
ATTRIBUTES
SEE ALSO
ufir8uu
unsigned
Result
×
dspmul
2, 3
No
94
—
0
2
3
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