SAA7115HL/V1,518 NXP Semiconductors, SAA7115HL/V1,518 Datasheet - Page 331

• Manufacturer Part Number: SAA7115HL/V1,518
• Description: IC DIGITAL VIDEO DECODER 100LQFP
• Manufacturer: NXP Semiconductors
• Type: Video Decoderr

Specifications of SAA7115HL/V1,518

• Package / Case: 100-LQFP
• Applications: Set-Top Boxes
• Mounting Type: Surface Mount
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Voltage - Supply, Digital: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935270666518; SAA7115HLBE-T; SAA7115HLBE-T

PNX1300/01/02/11 Data Book
dspuquadaddui
SYNTAX
FUNCTION
DESCRIPTION
8-bit bytes of rsrc1 and rsrc2. The bytes in rsrc1 are considered unsigned values; the bytes in rsrc2 are considered
signed. The four sums are clipped into the unsigned range [255..0] (or [0xff..0]); thus, the final byte sums are
unsigned. All computations are performed without loss of precision.
controls the modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not
changed.
EXAMPLES
A-33
r30 = 0x02010001, r40 = 0xffffff01
r10 = 0, r60 = 0x9c9c6464, r70 = 0x649c649c
r20 = 1, r60 = 0x9c9c6464, r70 = 0x649c649c
As shown below, the
The
[ IF rguard ] dspuquadaddui rsrc1 rsrc2 → rdest
if rguard then {
}
rsrc1
for (i ← 0, m ← 31, n ← 24; i < 4; i ← i + 1, m ← m – 8, n ← n – 8) {
}
31
dspuquadaddui
temp ← zero_ext8to32(rsrc1<m:n>) + sign_ext8to32(rsrc2<m:n>)
if temp < 0 then
else if temp > 0xff then
else rdest<m:n> ← temp<7:0>
unsigned
rdest<m:n> ← 0
rdest<m:n> ← 0xff
10-bit signed sums
Four full-precision
Initial Values
23
unsigned
dspuquadaddui
PRELIMINARY SPECIFICATION
9
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB
Clip to [255..0]
15
signed
unsigned
rdest
31
unsigned
0
7
dspuquadaddui r30 r40 → r50
IF r10 dspuquadaddui r60 r70 → r80
IF r20 dspuquadaddui r60 r70 → r90
unsigned
operation computes four separate sums of the four pairs of corresponding
9
Clip to [255..0]
Quad clipped add of unsigned/signed bytes
23
signed
unsigned
0
0
15
9
unsigned
rsrc2
Operation
Clip to [255..0]
signed
31
signed
+
7
unsigned
0
23
9
Clip to [255..0]
signed
0
+
signed
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
Philips Semiconductors
15
0
signed
dspidualadd
ATTRIBUTES
r50 ← 0x01000002
no change, since guard is
false
r90 ← 0xff38c800
+
SEE ALSO
7
Result
signed
+
dspalu
1, 3
No
78
—
0
2
2