SAA7115HL/V1,518 NXP Semiconductors, SAA7115HL/V1,518 Datasheet - Page 436

IC DIGITAL VIDEO DECODER 100LQFP

SAA7115HL/V1,518

Manufacturer Part Number
SAA7115HL/V1,518
Description
IC DIGITAL VIDEO DECODER 100LQFP
Manufacturer
NXP Semiconductors
Type
Video Decoderr
Datasheets

Specifications of SAA7115HL/V1,518

Package / Case
100-LQFP
Applications
Set-Top Boxes
Mounting Type
Surface Mount
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-
Voltage - Supply, Digital
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935270666518
SAA7115HLBE-T
SAA7115HLBE-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAA7115HL/V1,518
Manufacturer:
Sigma Designs Inc
Quantity:
10 000
Philips Semiconductors
Merge least-significant byte
SYNTAX
FUNCTION
DESCRIPTION
rsrc1 and rsrc2 into rdest. The least-significant byte from rsrc2 is packed into the least-significant byte of rdest; the
least-significant byte from rsrc1 is packed into the second-least-significant byte of rdest; the second-least-significant
byte from rsrc2 is packed into the second-most-significant byte of rdest; and the second-least-significant byte from
rsrc1 is packed into the most-significant byte of rdest.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is unchanged.
EXAMPLES
r30 = 0x12345678, r40 = 0xaabbccdd
r10 = 0, r40 = 0xaabbccdd, r30 = 0x12345678
r20 = 1, r40 = 0xaabbccdd, r30 = 0x12345678
As shown below, the
The
[ IF rguard ] mergelsb rsrc1 rsrc2 → rdest
if rguard then {
}
rsrc1
mergelsb
31
rdest<7:0> ← rsrc2<7:0>
rdest<15:8> ← rsrc1<7:0>
rdest<23:16> ← rsrc2<15:8>
rdest<31:24> ← rsrc1<15:8>
Initial Values
23
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
mergelsb
15
rdest
operation interleaves the two pairs of least-significant bytes from the arguments
31
7
mergelsb r30 r40 → r50
IF r10 mergelsb r40 r30 → r60
IF r20 mergelsb r40 r30 → r70
23
0
15
Operation
PRELIMINARY SPECIFICATION
rsrc2
31
PNX1300/01/02/11 DSPCPU Operations
7
23
0
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
pack16lsb pack16msb
packbytes mergemsb
r50 ← 0x56cc78dd
no change, since guard is false
r70 ← 0xcc56dd78
15
ATTRIBUTES
SEE ALSO
mergelsb
Result
7
1, 2, 3, 4, 5
alu
No
57
0
2
1
A-138

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