AD9929BBCZ Analog Devices Inc, AD9929BBCZ Datasheet - Page 26

• Manufacturer Part Number: AD9929BBCZ
• Description: IC CCD SIGNAL PROCESSOR 64-BGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9929BBCZ

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 64-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: CSPBGA
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

AD9929
DIGITAL DATA OUTPUTS
The AD9929 DOUT[11:0] and DCLK phases are independently
programmable using the DOUTPHASE register (Address 0x02)
(INTERNAL)
POSITION
PERIOD
SIGNAL
PIXEL
CCD
CDS
RG
H1
PERIOD
DCLK1
H1
H2
PIXEL
DOUT
NOTES
1. ALL SIGNAL EDGES ARE FULLY PROGRAMMABLE TO ANY OF THE 48 POSITIONS WITHIN ONE PIXEL PERIOD.
2. DEFAULT POSITIONS FOR EACH SIGNAL ARE SHOWN.
NOTES
1. DCLK1 PHASE IS ADJUSTED BY SETTING THE DCLKPHASE REGISTER (ADDRESS 0x02)
2. DOUT PHASE CAN BE ADJUSTED BY SETTING THE DOUTPHASE REGISTER (ADDRESS 0x02)
P[0]
P[0]
RGr[0]
Hr[0]
t
RISE
t
OD
Figure 17. High Speed Clock Default and Programmable Locations
P[12]
RGf[12]
FIXED CROSSOVER VOLTAGE
P[12]
Figure 18. H-Clock Inverse Phase Relationship
Figure 19. Digital Output Phase Adjustment
SHP[20]
Rev. A | Page 26 of 64
t
PD
<
P[24]
P[24]
Hf[24]
t
RISE
and DCLKPHASE register (Address 0x02). Refer to Figure 19.
t
S1
H1
P[36]
P[36]
SHD[40]
t
PD
P[48] = P[0]
P[48] = P[0]
H2