AD9929BBCZ Analog Devices Inc, AD9929BBCZ Datasheet - Page 51

IC CCD SIGNAL PROCESSOR 64-BGA

AD9929BBCZ

Manufacturer Part Number
AD9929BBCZ
Description
IC CCD SIGNAL PROCESSOR 64-BGA
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 12-Bitr
Datasheet

Specifications of AD9929BBCZ

Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Mounting Type
Surface Mount
Package / Case
64-CSPBGA
Analog Front End Type
CCD
Analog Front End Category
Video
Interface Type
Serial (3-Wire)
Input Voltage Range
0.5V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Resolution
12b
Number Of Adc's
1
Power Supply Type
Analog/Digital
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Package Type
CSPBGA
Number Of Channels
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9929BBCZ
Manufacturer:
ADI
Quantity:
531
MSHUT High Precision Operation
The MSHUTPOS_HP register allows fine precision control of
the MSHUT position within a line. Under normal MSHUT
operation when MSHUTPOS_HP = 0, the MSHUT polarity
changes from high to low on the negative edge of the HD pulse,
as shown in Figure 53. By using the MSHUTPOS_HP register,
the rising and falling edges of MSHUT can be delayed by
multiples of the OL counter length that has been set in the
OLEN register. For example, if MSHUTPOS_HP = 3, the
XSUBCK
XVSG1-
MSHUT
XVSG2
XSUBCK
MSHUT¹
MSHUT²
XVSG1-
XVSG2
VD
HD
Figure 60. Example of MSHUT High Precision Timing MSHUTEN = 1, MSHUTPOS_HP = 3, with XSUBCKMODE_HP = 1, XSUBCKNUM_HP = 3
HD
VD
NOTES
1
2
MSHUT OUTPUT IN NORMAL OPERATION WITH MSHUTPOS_HP = 0
MSHUT OUTPUT IN HIGH PRECISION OPERATION WITH MSHUTPOS_HP = 3
MSHUTPOS = 3
1
MSHUTPOS = 3
1
COUNTER
OL
2
Figure 59. Example of MSHUT High Precision Timing MSHUTEN = 1 and MSHUTPOS_HP = 3
2
3
3
1
1
MSHUTPAT = 0, MSHUTLEN = 5
MSHUTPAT = 0, MSHUTLEN = 5
2
2
COUNTER
OL
3
3
COUNTER
Rev. A | Page 51 of 64
DELAY = 3 OL
COUNTER LENGTHS
OL
4
4
COUNTER
OL
5
5
t
EXP
t
MSHUT rising and falling edges are delayed by three OL
counter cycles after the falling edge of HD, as shown in
Figure 56.
Figure 56 provides an example of high precision MSHUT and
SUBCK timing. In this example, the length of the OL counter is
shorter. This provides finer precision control of the placement
of the MSHUT pulse within a line.
EXP
AD9929

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