AD9929BBCZ Analog Devices Inc, AD9929BBCZ Datasheet - Page 9

• Manufacturer Part Number: AD9929BBCZ
• Description: IC CCD SIGNAL PROCESSOR 64-BGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9929BBCZ

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 64-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: CSPBGA
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
Table 7. Pin Function Descriptions
Pin
D1
D2
B8
A8
A7
B7
A6
B6
B5
A4
B3
A3
B2
A2
A1
B4
A5
G9
D10
E9
G10
H9
H10
C10
F10
F9
E10
1
AI = Analog Input, AO = Analog Output, DI = Digital Input,
DO = Digital Output, DIO = Digital Input/Output, P = Power.
Mnemonic
VD
HD
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
DCLK1
DRVSS
DRVDD
SUBCK
V1
V2
V3
V4
VH1
VM1
VM2
VL
VH2
Type
DIO
DIO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
P
P
DO
DO
DO
DO
DO
P
P
P
P
P
1
Description
Vertical Sync Pulse (Input for Slave
Mode, Output for Master Mode)
Horizontal Sync Pulse (Input for
Slave Mode, Output for Master
Mode)
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Clock Output
Data Output Driver Ground
Data Output Driver Supply
CCD Substrate Clock
(2 Level: VH2, VL)
CCD Vertical Transfer Clock
(3 Level: VH1, VM1, VL)
CCD Vertical Transfer Clock
(2 Level: VM2, VL)
CCD Vertical Transfer Clock
(3 Level: VH1, VM1, VL)
CCD Vertical Transfer Clock
(2 Level: VM2, VL)
Vertical Driver High Supply
(High Supply for V1 and V3)
Vertical Driver Midsupply
(Midsupply for V1 and V3)
Vertical Driver Midsupply
(Midsupply for V2 and V4)
Vertical Driver Low Supply
Vertical Driver High Supply for
SUBCK
A 1 CORNER
INDEX AREA
Figure 2. Pin Configuration
A
B
C
D
E
F
G
H
J
K
Rev. A | Page 9 of 64
1 2 3 4 5 6 7 8 9 10
(Not to Scale)
AD9929
TOP VIEW
Pin
B10
J9
A9
G1
F1
E1
E2
F2
G2
H1
J1
H2
C9
C1
K3
J3
J4
J5
J6
J7
J8
K4
K6
J2
K2
K1
K5
K7
K8
K9
K10
J10
D9
B1
C2
A10
B9
Mnemonic
VDD
VDVSS
VSUB
H1
H2
HVDD
HVSS
HVSS
HVSS
RG
RGVDD
RGVSS
SYNC or
VGATE
FD or
DCLK2
AVDD
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
CLI
TCVDD
TCVSS
CCDIN
REFT
REFB
SDATA
SL
SCK
OUTCONT
MSHUT
STROBE
DVDD
DVSS
Type
P
P
DO
DO
DO
P
P
P
P
DO
P
P
DI
DI
DO
DO
P
P
P
P
P
P
P
P
P
DI
P
P
AI
AO
AO
DI
DI
DI
DI
DO
DO
P
P
1
Description
Vertical Driver Input Logic Supply
Vertical Driver Ground
CCD Substrate Bias
CCD Horizontal Clock
CCD Horizontal Clock
H1 and H2 Driver Supply
H1 and H2 Driver Ground
H1 and H2 Driver Ground
H1 and H2 Driver Ground
CCD Reset Gate Clock
RG Driver Supply
RG Driver Ground
External System Sync Input
VGATE Input
Field Designator Output
DCLK2 Output
Analog Supply for AFE
Analog Ground for AFE
Analog Ground for AFE
Analog Ground for AFE
Analog Ground for AFE
Analog Ground for AFE
Analog Ground for AFE
Analog Ground for AFE
Analog Ground for AFE
Reference Clock Input
Analog Supply for Timing Core
Analog Ground for Timing Core
CCD Input Signal
Voltage Reference Top Bypass
Voltage Reference Bottom Bypass
3-Wire Serial Data Input
3-Wire Serial Load Pulse
3-Wire Serial Clock
Output Control
Mechanical Shutter Pulse
Strobe Pulse
Digital Supply
Digital Ground
AD9929