TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 124
TSI148-133CL
Manufacturer Part Number
TSI148-133CL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets
1.TSI148-133CL.pdf
(391 pages)
2.TSI148-133CL.pdf
(2 pages)
3.TSI148-133CL.pdf
(12 pages)
Specifications of TSI148-133CL
Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Package Type
BGA
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1906
Available stocks
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Company:
Part Number:
TSI148-133CL
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
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TUNDRA
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5. Resets, Clocks, and Power-up Options > Power-up Options
5.4
5.4.1
5.4.1.1
124
The PCI/X bus clock input provides the reference clock for the internal PLL. The PLL is used
to derive the 16 MHz VMEbus SYSCLK.
If the PCI/X clock input is below the maximum frequency defined for a specific
configuration, the PLL frequency is scaled accordingly. When the PLL frequency is scaled
down the VMEbus timing parameters are not violated, but the VMEbus performance and
timer accuracy is affected. When this situation occurs the VMEbus SYSCLK output should
not be used.
Power-up Options
Tsi148 samples various VMEbus and PCI/X bus signals during reset to enable or disable
certain functions.
PCI/X Power-up Options
The PCI/X Interface has power-up options that control how the interface is configured for use
in a system.
Bus Width
The PCI/X Interface supports 32-bit or 64-bit PCI/X bus widths. The PCI/X bus width is
configured during a PCI/X bus reset. If REQ64_ is high during the rising edge of LRSTI_,
then the chip is configured for 32-bit PCI/X. If REQ64_ is low during the rising edge of
LRSTI_, then the chip is configured for 64-bit PCI/X. When the chip is used on a 32-bit
PCI/X bus, REQ64_ should be pulled high with a weak pull-up resistor.
When the Tsi148 is used on a 32-bit PCI/X bus, it drives CBE[7:4]_, AD[63:32], and PAR64
at all times. These signals may be left unconnected when the chip is used on a 32-bit PCI/X
bus. When the chip is used on a 64-bit PCI/X bus, it must not be configured for 32-bit
operation. Other PCI/X devices may drive their 64-bit extension signals and this could cause
excessive currents in the output drivers.
When in 32-bit PCI/X mode, the ACK64 signal must be pulled up with an
external resistor.
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
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