TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 328

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

10. Registers > Register Map
328
PFAR (PCI/X Flush on Aborted Read): If this bit is set and a PCI/X bus cycle is terminated
with an exception, any data remaining in the FIFO is transferred to the destination. If this bit
is cleared and a PCI/X bus cycle is terminated with an exception, any data remaining in the
DMA FIFO is discarded.
VBKS (VMEbus Block Size): This field is used to control the VMEbus block size when the
source is the VMEbus. The encoding of this field is shown in
Table 136: DCTL BKS Encoding
VBOT (VMEbus Back-off Timer): The back-off timer determines how long the DMA
controller waits before requesting the next block of data. This field controls the internal data
flow between the DMA controller and the VME Master Module. The DMA does not attempt
to read the next block until after the Back-off Timer has expired. To control the amount of
time the VME Master is allowed to spend on the bus during DMA transfers please see the
VME Master Control Register
VBKS
000b
001b
010b
011b
100b
101b
110b
111b
Transfer Size
(bytes)
1024
2048
4096
128
256
512
32
64
(Table 10.4.34 on page
Tsi148 PCI/X-to-VME Bus Bridge User Manual
253).
Table 136
80A3020_MA001_13