TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 193

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

10.2.2
10.2.3
10.2.4
10.2.5
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
The CRG can also be mapped into A16, A24, A32 and A64 VME address space through the
CRG image (located at offsets 0x40Ch – 0x414h). The CRG can be accessed using D8, D16
and D32 SCT transactions. All accesses pass through the VME Slave Interface.
Alternatively, the CRG can be accessed as part of the 512 Kbyte CR/CSR area defined in the
American National Standard for VME64 by using the special A24 CR/CSR AM code.
PCI/X Configuration Space Registers (PCFS)
This register area is the standard PCI/X configuration space and is accessible from the PCI/X
bus using PCI/X configuration cycles.
The PCFS area includes a standard 64-bit Base Address Register (see MBARL and MBARU
registers in
memory space.
The PCFS can also be accessed from the VMEbus as part of the CRG group.
Local Control and Status Registers (LCSR)
The LCSR register group contains the inbound and outbound map decoder registers, DMA,
interrupt control registers, and other miscellaneous registers. It can accessed from either the
PCI/X bus or VMEbus as part of the CRG.
Global Control and Status Registers (GCSR)
The GCSR register group contains control bits, semaphore, and mailbox registers which allow
information to be passed between processors on other VMEbus boards and the local
processor.
It can accessed from either the PCI/X bus or VMEbus as part of the CRG. Alternatively, the
GCSR group can be independently accessed from the VMEbus by using the GCSR image
(located at offsets 0x418h – 0x420h).
The GCSR can be mapped to the VMEbus A16, A24, A32 or A64 address spaces and accepts
D8, D16 and D32 SCT transactions.
Control and Status Registers (CSR)
The CSR register group is a sub-set of the CR/CSR section of the CR/CSR registers defined in
the American National Standard for VME64 Extensions. Tsi148 implementation of these
standard registers include: the CR/CSR Bit Clear, CR/CSR Bit Set, and CR/CSR Base
Address Registers.
Section 10.4.2 on page
198) which enables the CRG to be mapped into PCI/X
10. Registers > Register Groupings
193