TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 97

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

4.4
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
Operating Modes
There are two operating modes for the DMA Controller: Direct mode and Linked-list mode.
In Direct mode, the DMA control registers are programmed by the processor. Once the
command has completed, the status of the completed command is given within the DMA
status registers and an optional interrupt is asserted on the INTx signal lines (see
on page
In Linked-list mode, the DMA controller executes a list of commands which are stored in
system memory. The DMA fetches these commands from the PCI/X bus. Once all the
commands have been fetched and executed, the status of the completed commands is given
within the DMA status registers and, optionally, an interrupt is asserted on the INTx signal
lines.
Figure 18
Figure 18: Direct Mode
Figure 19
Registers
Program
157).
Direct Mode, Different Start/End Domain
Processor
shows the DMA controller’s direct mode.
shows the linked-list mode of the DMA controller.
When the Tsi148's DMA interface signals a DONE interrupt, data could still be
queued in either the Tsi148's VME Master interface buffer, or the PCI/X Master
interface buffer, depending on the direction of the DMA transfer. In order to
ensure all DMA data has been flushed from within the Tsi148, a local processor
can initiate a read from VME memory (that is, a Tsi148 register in CR/CSR space,
etc.)
Program
(Start)
DGO
Transfer
Registers
Program
Read
Write
Data
Data
Processor
Direct Mode, Pattern Write
Program
(Start)
DGO
Done
Transfer
Pattern
Write
Registers
Program
Direct Mode, Same Start/End Domain
Processor
Done
Program
(Start)
DGO
4. DMA Interface > Operating Modes
Transfer
Read
Data
Write
Data
Section 8.4.2
Done
97