PEB20256EV21GXP Infineon Technologies, PEB20256EV21GXP Datasheet - Page 14

• Manufacturer Part Number: PEB20256EV21GXP
• Manufacturer: Infineon Technologies

Specifications of PEB20256EV21GXP

• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

List of Figures
Figure 8-7
Figure 8-8
Figure 8-9
Figure 8-10
Figure 8-11
Figure 8-12
Figure 8-13
Figure 8-14
Figure 8-15
Figure 8-16
Figure 8-17
Figure 8-18
Figure 8-19
Figure 8-20
Figure 8-21
Figure 8-22
Figure 8-23
Figure 9-1
Figure 9-2
Figure 9-3
Figure 9-4
Figure 9-5
Figure 9-6
Figure 9-7
Figure 9-8
Figure 9-9
Figure 9-10
Figure 9-11
Figure 9-12
Figure 9-13
Figure 9-14
Figure 9-15
Figure 9-16
Figure 9-17
Figure 9-18
Figure 9-19
Figure 9-20
Figure 9-21
Figure 9-22
Figure 9-23
Figure 9-24
Figure 9-25
Data Sheet
T1 Mode Frame Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
E1, 4.096 MHz and 8.192 MHz Interface Timing in 16-port mode . . . 161
Unchannelized Mode Interface Timing . . . . . . . . . . . . . . . . . . . . . . . 161
T1-mode Interface Timing in 28-port Mode . . . . . . . . . . . . . . . . . . . . 161
E1-mode Interface Timing in 28-port Mode . . . . . . . . . . . . . . . . . . . . 161
Mailbox Interrupt Notification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Port Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Local Port Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Remote Payload Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Remote Channel Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Test Breakout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
MUNICH256 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
MUNICH256 Pin Configuration 16-Port Mode . . . . . . . . . . . . . . . . . . 161
MUNICH256 Pin Configuration 28-Port Mode . . . . . . . . . . . . . . . . . . 161
System Integration of the MUNICH256 . . . . . . . . . . . . . . . . . . . . . . . 161
MUNICH256 16-port Mode Logic Symbol . . . . . . . . . . . . . . . . . . . . . 161
MUNICH256 28-port Mode Logic Symbol . . . . . . . . . . . . . . . . . . . . . 161
Input/Output Waveform for AC Tests . . . . . . . . . . . . . . . . . . . . . . . . . 205
PCI Clock Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
PCI Input Timing Measurement Conditions . . . . . . . . . . . . . . . . . . . . 206
PCI Output Timing Measurement Conditions . . . . . . . . . . . . . . . . . . 207
SPI Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
Intel Read Cycle Timing (Slave Mode) . . . . . . . . . . . . . . . . . . . . . . . 209
Intel Write Cycle Timing (Slave Mode). . . . . . . . . . . . . . . . . . . . . . . . 209
Intel Read Cycle Timing (Master Mode, LRDY controlled) . . . . . . . . 211
Intel Write Cycle Timing (Master Mode, LRDY controlled). . . . . . . . . 211
Intel Read Cycle Timing (Master Mode, Wait state controlled) . . . . . 212
Intel Write Cycle Timing (Master Mode, Wait state controlled) . . . . . 212
Intel Bus Arbitration Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
Motorola Read Cycle Timing (Slave Mode) . . . . . . . . . . . . . . . . . . . . 214
Motorola Write Cycle Timing (Slave Mode) . . . . . . . . . . . . . . . . . . . . 214
Motorola Read Cycle Timing (Master Mode, LDTACK controlled). . . 216
Motorola Write Cycle Timing (Master Mode, LDTACK controlled). . . 216
Motorola Read Cycle Timing (Master Mode, Wait state controlled). . 217
Motorola Write Cycle Timing (Master Mode, Wait state controlled). . 217
Motorola Bus Arbitration Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
Transmit Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
Transmit Synchronization Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
Receive Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
Receive Synchronization Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
JTAG Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
14
PEB 20256 E
PEF 20256 E
04.2001
Page