PEB20256EV21GXP Infineon Technologies, PEB20256EV21GXP Datasheet - Page 46

• Manufacturer Part Number: PEB20256EV21GXP
• Manufacturer: Infineon Technologies

Specifications of PEB20256EV21GXP

• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

3
3.1
MUNICH256
The MUNICH256 is a highly integrated WAN protocol controller that performs HDLC,
PPP and transparent (TMA) protocol processing on 256 full duplex serial channels and
a configurable port mode with 16 or 28 links.
Dependent on the port mode a link can be operated in T1/E1, in channelized 4.096 MHz/
8.192 MHz mode (16-port mode only) or in unchannelized mode. The internal framing
function is switched off in this mode.
In 16-port mode the system interface consists of one receive clock input, one receive
synchronization pulse input and one receive data input for each receive line. In transmit
direction each link consists of one transmit clock input, one transmit synchronization
input and one transmit data output. Synchronization pulses are not supported in
unchannelized mode.
In 28-port mode the system interface consists of a receive clock input and a receive data
input. In transmit direction a transmit clock input and a transmit data output is provided.
Frame boundaries are indicated by clock gaps.
The device provides a maximum aggregate data rate of 90 Mbit/s per direction,
assuming a PCI frequency of 66 MHz (45 Mbit/s at 33 MHz). The following clock rates
are supported where the sum of all clock rates does not exceed the above throughput
limitation:
In 16-port mode:
• T1 mode with 1.544 MHz on any port.
• E1 mode with 2.048 MHz on any port.
• Channelized mode with 4.096 MHz on any port.
• Channelized mode with 8.192 MHz on any port.
• Unchannelized mode with up to 45 MHz on port zero.
• Unchannelized mode with up to 8.192 MHz on all other ports.
In 28-port mode:
• T1 mode (1.544 MHz) with gapped clock on any port.
• E1 mode (2.048 MHz) with gapped clock on any port.
• Unchannelized mode with up to 45 MHz on port zero.
• Unchannelized mode with up to 8.192 MHz on all other ports.
A variety of loop modes is provided to support remote as well as inloop testing of the
device.
Two bus interfaces, a PCI Rev. 2.1 compliant bus interface and a 16 bit Intel/Motorola
style bus interface, connect the device to system environment. Device configuration and
Data Sheet
General Overview
Functional Overview
46
General Overview
PEB 20256 E
PEF 20256 E
04.2001