MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 118

MC68HC908LD60IFU

Manufacturer Part Number
MC68HC908LD60IFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC908LD60IFU

Cpu Family
HC08
Device Core Size
8b
Frequency (max)
6MHz
Program Memory Type
Flash
Program Memory Size
60KB
Total Internal Ram Size
1KB
# I/os (max)
39
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
6-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Package Type
PQFP
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908LD60IFU
Manufacturer:
FREESCALE
Quantity:
840
System Integration Module (SIM)
9.6.1 Interrupts
Technical Data
118
INTERRUPT
I BIT
R/W
INTERRUPT
IDB
I BIT
IAB
R/W
IDB
IAB
MODULE
MODULE
DUMMY
DUMMY
SP – 4
SP
An interrupt temporarily changes the sequence of program execution to
respond to a particular event.
system interrupts.
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt can take precedence, regardless of priority,
until the latched interrupt is serviced (or the I bit is cleared).
At the beginning of an interrupt, the CPU saves the CPU register
contents on the stack and sets the interrupt mask (I bit) to prevent
additional interrupts. At the end of an interrupt, the RTI instruction
recovers the CPU register contents from the stack so that normal
processing can resume.
9-9
PC – 1[7:0] PC – 1[15:8]
CCR
shows interrupt recovery timing.
SP – 1
SP – 3
Figure 9-9. Interrupt Recovery
Figure 9-8
System Integration Module (SIM)
A
SP – 2
SP – 2
X
X
.
Interrupt Entry
SP – 3
SP – 1
Figure 9-8
PC – 1[7:0] PC – 1[15:8]
A
Figure 9-10
SP – 4
SP
CCR
shows interrupt entry timing.
VECT H
PC
OPCODE
V DATA H
flow charts the handling of
VECT L
PC + 1
MC68HC908LD60
OPERAND
V DATA L
Freescale Semiconductor
START ADDR
OPCODE
Figure
Rev. 1.1

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