MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 221

MC68HC908LD60IFU

Manufacturer Part Number
MC68HC908LD60IFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC908LD60IFU

Cpu Family
HC08
Device Core Size
8b
Frequency (max)
6MHz
Program Memory Type
Flash
Program Memory Size
60KB
Total Internal Ram Size
1KB
# I/os (max)
39
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
6-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Package Type
PQFP
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908LD60IFU
Manufacturer:
FREESCALE
Quantity:
840
16.6.2 Sync Processor Input/Output Control Register (SPIOCR)
MC68HC908LD60
Freescale Semiconductor
Rev. 1.1
Figure 16-5. Sync Processor Input/Output Control Register (SPIOCR)
Address:
VPOL — Vsync Input Polarity
HPOL — Hsync Input Polarity
VSYNCS — VSYNC Input State
HSYNCS — HSYNC Input State
Reset:
Read: VSYNCS HSYNCS
Write:
This bit indicates the polarity of the VSYNC input, or the extracted
Vsync from a composite sync input (COMP=1). Reset clears this bit.
This bit indicates the polarity of the HSYNC input. This bit equals the
VPOL bit when the COMP bit is set. Reset clears this bit.
This read-only bit reflects the logical state of the VSYNC input.
This read-only bit reflects the logical state of the HSYNC input.
ATPOL
1 = Vsync is positive polarity
0 = Vsync is negative polarity
1 = Hsync is positive polarity
0 = Hsync is negative polarity
0
0
1
1
$0045
Bit 7
0
Table 16-4. ATPOL, VINVO, and HINVO setting
= Unimplemented
Sync Processor
6
0
VINVO / HINVO
COINV
0
1
0
1
5
0
R
4
Same polarity as sync input
Inverted polarity of sync input
Negative polarity sync output
Positive polarity sync output
R
R
3
Sync Outputs:
Sync Processor I/O Registers
VOUT/HOUT
= Reserved
R
2
BPOR
Sync Processor
1
0
Technical Data
SOUT
Bit 0
0
221

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