MC68HC908LD60IFU Freescale Semiconductor, MC68HC908LD60IFU Datasheet - Page 232

• Manufacturer Part Number: MC68HC908LD60IFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908LD60IFU

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 6MHz
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 6-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Compliant

Input/Output (I/O) Ports
17.2 Introduction
Technical Data
232
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
Data Direction Register A
Data Direction Register B
Register Name
Port A Data Register
Port B Data Register
Port C Data Register
Port D Data Register
NOTE:
(DDRA)
(DDRB)
(PTC)
(PTD)
(PTA)
(PTB)
Thirty-nine (39) bidirectional input-output (I/O) pins form five parallel
ports. All I/O pins are programmable as inputs or outputs.
Connect any unused I/O pins to an appropriate logic level, either V
V
operation, termination reduces excess current consumption and the
possibility of electrostatic damage.
SS
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Figure 17-1. Port I/O Register Summary
. Although the I/O ports do not require termination for proper
DDRA7
DDRB7
PTD7
PTA7
PTB7
Bit 7
0
0
0
Input/Output (I/O) Ports
= Unimplemented
DDRA6
DDRB6
PTC6
PTA6
PTB6
PTD6
6
0
0
DDRA5
DDRB5
PTA5
PTB5
PTC5
PTD5
5
0
0
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
DDRA4
DDRB4
PTA4
PTB4
PTC4
PTD4
4
0
0
DDRA3
DDRB3
PTA3
PTB3
PTC3
PTD3
3
0
0
MC68HC908LD60
DDRA2
DDRB2
PTA2
PTB2
PTC2
PTD2
Freescale Semiconductor
0
0
2
DDRA1
DDRB1
PTA1
PTB1
PTC1
PTD1
1
0
0
—
Rev. 1.1
DDRA0
DDRB0
PTA0
PTB0
PTC0
PTD0
Bit 0
DD
0
0
or