DS2156L+ Maxim Integrated Products, DS2156L+ Datasheet - Page 136

IC TXRX T1/E1/J1 1-CHIP 100-LQFP

DS2156L+

Manufacturer Part Number
DS2156L+
Description
IC TXRX T1/E1/J1 1-CHIP 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2156L+

Function
Single-Chip Transceiver
Interface
E1, J1, T1, TDM, UTOPIA II
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive SS7 Fill-In Signal Unit Delete (RSFD)
Bits 1 to 5/Unused, must be set to 0 or proper operation
Bit 6/Receive HDLC Mapping Select (RHMS)
Bit 7/Receive HDLC Reset (RHR). Resets the receive HDLC controller and flushes the receive FIFO. Must be
cleared and set again for a subsequent reset.
0 = normal operation; all FISUs are stored in the receive FIFO and reported to the host.
1 = When a consecutive FISU having the same BSN the previous FISU is detected, it is deleted without
host intervention.
0 = receive HDLC assigned to channels
1 = receive HDLC assigned to FDL (T1 mode), Sa bits (E1 mode)
0 = normal operation
1 = reset receive HDLC controller and flush the receive FIFO
RHR
7
0
RHMS
H1RC, H2RC
HDLC #1 Receive Control
HDLC #2 Receive Control
31h, 32h
6
0
5
0
4
0
136 of 265
3
0
2
0
1
0
RSFD
0
0

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