DS2156L+ Maxim Integrated Products, DS2156L+ Datasheet - Page 244
DS2156L+
Manufacturer Part Number
DS2156L+
Description
IC TXRX T1/E1/J1 1-CHIP 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS2156L.pdf
(265 pages)
Specifications of DS2156L+
Function
Single-Chip Transceiver
Interface
E1, J1, T1, TDM, UTOPIA II
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
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Figure 34-19. Transmit-Side Boundary Timing (Elastic Store Disabled)
Note 1: TSYNC is in the output mode (IOCR1.1 = 1).
Note 2: TSYNC is in the input mode (IOCR1.1 = 0).
Note 3: TCHBLK is programmed to block channel 2.
Note 4: TLINK is programmed to source the Sa4 bit.
Note 5: The signaling data at TSIG during channel 1 is normally overwritten in the transmit formatter with the CAS MF alignment nibble (0000).
Note 6: Shown is a TNAF frame boundary.
Figure 34-20. Transmit-Side Boundary Timing, TSYSCLK = 1.544MHz
(Elastic Store Enabled)
Note 1: The F-bit position in the TSER data is ignored.
Note 2: TCHBLK is programmed to block channel 24.
TSYSCLK
TCHBLK
TCHCLK
TSSYNC
TCHBLK
TCHCLK
TSER
TSYNC
TSYNC
TLCLK
TLINK
TSER
TCLK
TSIG
1
2
1
2
3
4
4
LSB
D
DON'T CARE
CHANNEL 23
Si
1
A
Sa4 Sa5 Sa6 Sa7 Sa8
CHANNEL 1
LSB MSB
CHANNEL 1
244 of 265
CHANNEL 24
MSB
DON'T CARE
LSB
CHANNEL 2
CHANNEL 2
A
F MSB
B
C
LSB MSB
CHANNEL 1
D
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