AT32UC3A0128 Atmel Corporation, AT32UC3A0128 Datasheet - Page 117

• Manufacturer Part Number: AT32UC3A0128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A0128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 109
• Ext Interrupts: 109
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058K AVR32-01/12
18.4.5
18.4.6
Quick Page Read
Write page buffer operations
The flash controller supports flash blocks with up to 2^21 word addresses, as displayed in
ure
result. The User page is permanently mapped to word address 2^21.
Table 18-1.
Figure 18-1. Memory map for the Flash memories
A dedicated command, Quick Page Read (QPR), is provided to read all words in an
addressed page. All bits in all words in this page are AND’ed together, returning a 1-bit result.
This result is placed in the Quick Page Read Result (QPRR) bit in Flash Status Register
(FSR). The QPR command is useful to check that a page is in an erased state. The QPR
instruction is much faster than performing the erased-page check using a regular software
subroutine.
The internal memory area reserved for the embedded flash can also be written through a
write-only page buffer. The page buffer is addressed only by the address bits required to
address w words (since the page buffer is word addressable) and thus wrap around within the
internal memory area address space and appear to be repeated within it.
When writing to the page buffer, the PAGEN field in the FCMD register is updated with the
page number corresponding to page address of the latest word written into the page buffer.
Memory type
Main array
User
18-1. Reading the memory space between address pw and 2^21-1 returns an undefined
User row addresses
2 ^ 2 1 + 1 2 8
A ll a d d r e s s e s a r e w o r d a d d r e s s e s
Start address, byte sized
0
2^23 = 8388608
p w - 1
2 ^ 2 1
p w
F la s h w it h
e x t r a p a g e
0
U n u s e d
U s e r p a g e
Size
pw words = 4pw bytes
128 words = 512 bytes
AT32UC3A
Fig-
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