AT32UC3A0128 Atmel Corporation, AT32UC3A0128 Datasheet - Page 368
AT32UC3A0128
Manufacturer Part Number
AT32UC3A0128
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
Specifications of AT32UC3A0128
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Price
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166
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Part Number:
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20 000
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4
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32058K AVR32-01/12
27.5
27.5.1
27.6
27.6.1
27.6.1.1
Figure 27-2. SMC Connections to Static Memory Devices
27.6.2
Product Dependencies
Functionnal Description
EBI I/O Lines
Application Example
External Memory Mapping
Static Memory
Controller
Hardware Interface
A1/NWR2/NBS2
NWR3/NBS3
NWR1/NBS1
NWR0/NWE
A0/NBS0
A2-A25
D0-D31
NCS1
NCS3
NCS4
NCS5
NCS0
NCS2
The Static Memory Controller signals pass througth the EBI module where they are multiplexed.
The programmer must first configure the GPIO controller to assign the EBI pins corresponding to
SMC signals to their peripheral function. If I/O lines of the EBI corresponding to SMC
signals are not used by the application, they can be used for other purposes by the GPIO
Controller.
The SMC provides up to 26 address lines, A[25:0]. This allows each chip select line to address
up to 64 Mbytes of memory.
A1/NWR2/NBS2
NWR0/NWE
NRD
NRD
D16-D23
D0-D7
CS
OE
CS
OE
WE
WE
D0-D7
D0-D7
128K x 8
128K x 8
SRAM
SRAM
A0-A16
A0-A16
A2-A18
A2-A18
NWR1/NBS1
NWR3/NBS3
D24-D31
D8-D15
NRD
NRD
CS
OE
CS
OE
WE
WE
D0-D7
D0-D7
128K x 8
128K x 8
SRAM
SRAM
A0-A16
A0-A16
A2-A18
A2-A18
AT32UC3A
368
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