AT32UC3A0128 Atmel Corporation, AT32UC3A0128 Datasheet - Page 72

• Manufacturer Part Number: AT32UC3A0128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A0128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 109
• Ext Interrupts: 109
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058K AVR32-01/12
13.6.4
Name:
Access Type:
•
•
•
•
•
RESERVED: Reserved bitfields
PLLCOUNT: PLL Count
PLLMUL: PLL Multiply Factor
PLLDIV: PLL Division Factor
PLLOPT: PLL Option
31
23
15
7
-
Reserved for internal use. Always write to 0.
Specifies the number of slow clock cycles before ISR:LOCKn will be set after PLLn has been written, or after PLLn has been
automatically re-enabled after exiting a sleep mode.
These bitfields determine the ratio of the PLL output frequency (voltage controlled oscillator frequency f
oscillator frequency:
If PLLOPT[1] field is set to 0:
f
If PLLOPT[1] field is set to 1:
f
Note that the MUL field cannot be equal to 0 or 1, or the behavior of the PLL will be undefined.
Select the operating range for the PLL.
PLLOPT[0]: Select the VCO frequency range.
PLLOPT[1]: Enable the extra output divider.
PLLOPT[2]: Disable the Wide-Bandwidth mode (Wide-Bandwidth mode allows a faster startup time and out-of-lock time).
f
f
PLL
PLL
VCO
VCO
RESERVED
PLL Control
= f
= f
= (PLLMUL+1)/(PLLDIV) • f
= 2*(PLLMUL+1) • f
VCO.
VCO
/ 2
.
30
22
14
6
-
PLL0,1
Read/Write
RESERVED
RESERVED
OSC
if PLLDIV = 0.
29
21
13
5
-
OSC
if PLLDIV > 0.
28
20
12
4
PLLOPT
27
19
11
3
PLLCOUNT
26
18
10
2
PLLMUL
PLLDIV
PLLOSC
25
17
9
1
VCO
AT32UC3A
) to the source
PLLEN
24
16
8
0
72