AT90PWM161 Atmel Corporation, AT90PWM161 Datasheet - Page 134

• Manufacturer Part Number: AT90PWM161
• Manufacturer: Atmel Corporation

Specifications of AT90PWM161

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

12.25.2
12.25.3
134
AT90PWM81
Output Compare SA Register – OCRnSAH and OCRnSAL
Output Compare RA Register – OCRnRAH and OCRnRAL
Table 12-12.
• Bit 3 – POEN2D : PSCOUT23 Output Enable (PSC2 only)
When this bit is clear, second I/O pin affected to PSCOUT23 acts as a standard port.
When this bit is set, second I/O pin affected to PSCOUT23 is connected to the PSC waveform generator B
output and is set and clear according to the PSC operation.
• Bit 2 – POENnB: PSC n OUT Part B Output Enable
When this bit is clear, I/O pin affected to PSCOUTn1 acts as a standard port.
When this bit is set, I/O pin affected to PSCOUTn1 is connected to the PSC waveform generator B output
and is set and clear according to the PSC operation.
• Bit 1 – POEN2C : PSCOUT22 Output Enable (PSC2 only)
When this bit is clear, second I/O pin affected to PSCOUT22 acts as a standard port.
When this bit is set, second I/O pin affected to PSCOUT22 is connected to the PSC waveform generator A
output and is set and clear according to the PSC operation.
• Bit 0 – POENnA: PSC n OUT Part A Output Enable
When this bit is clear, I/O pin affected to PSCOUTn0 acts as a standard port.
When this bit is set, I/O pin affected to PSCOUTn0 is connected to the PSC waveform generator A output
and is set and clear according to the PSC operation.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
PSYNCn1
0
0
1
1
7
–
OCRnSA[7:0]
W
0
7
–
OCRnRA[7:0]
W
0
Synchronization Source Description in Centered Mode
PSYNCn0
0
1
0
1
6
–
W
0
6
–
W
0
Description
Send signal on match with OCRnRA (during counting down of PSC). The min
value of OCRnRA must be 1.
Send signal on match with OCRnRA (during counting up of PSC). The min value
of OCRnRA must be 1.
no synchronization signal
no synchronization signal
5
–
W
0
5
–
W
0
4
–
W
0
4
–
W
0
3
OCRnSA[11:8]
W
0
3
OCRnRA[11:8]
W
0
2
W
0
2
W
0
1
W
0
1
W
0
0
W
0
0
W
0
7734P–AVR–08/10
OCRnSAH
OCRnSAL
OCRnRAH
OCRnRAL