AT90PWM161 Atmel Corporation, AT90PWM161 Datasheet - Page 220

• Manufacturer Part Number: AT90PWM161
• Manufacturer: Atmel Corporation

Specifications of AT90PWM161

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

17.8.4
17.8.4.1
220
AT90PWM81
ADC Result Data Registers – ADCH and ADCL
ADLAR = 0
In case of trig on PSCnASY event, there is no flag. So, if ADSSEN is reset, a conversion will start each
time the trig event appears and the previous conversion is completed ..
Table 17-6.
When an ADC conversion is complete, the conversion results are stored in these two result data registers.
When the ADCL register is read, the two ADC result data registers can’t be updated until the ADCH reg-
ister has also been read.
Consequently, in 10-bit configuration, the ADCL register must be read first before the ADCH.
Nevertheless, to work easily with only 8-bit precision, there is the possibility to left adjust the result
thanks to the ADLAR bit in the ADCSRA register. Like this, it is sufficient to only read ADCH to have
the conversion result.
Bit
Read/Write
Initial Value
ADTS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
ADC Auto Trigger Source Selection
7
-
ADC7
R
R
0
0
ADTS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
6
-
ADC6
R
R
0
0
ADTS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
5
-
ADC5
R
R
0
0
4
-
ADC4
R
R
0
0
ADTS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
3
-
ADC3
R
R
0
0
Description
Free Running Mode
Analog Comparator 1
External Interrupt Request 0
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
PSCRASY Event
PSC2ASY Event
Analog comparator 2
Analog comparator 3
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
2
-
ADC2
R
R
0
0
1
ADC9
ADC1
R
R
0
0
0
ADC8
ADC0
R
R
0
0
7734P–AVR–08/10
ADCH
ADCL