AT90PWM161 Atmel Corporation, AT90PWM161 Datasheet - Page 234

• Manufacturer Part Number: AT90PWM161
• Manufacturer: Atmel Corporation

Specifications of AT90PWM161

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

20.3.1
20.3.2
234
AT90PWM81
RWW – Read-While-Write Section
NRWW – No Read-While-Write Section
Note that the user software can never read any code that is located inside the RWW section during a Boot
Loader software operation. The syntax “Read-While-Write section” refers to which section that is being
programmed (erased or written), not which section that actually is being read during a Boot Loader soft-
ware update.
If a Boot Loader software update is programming a page inside the RWW section, it is possible to read
code from the Flash, but only code that is located in the NRWW section. During an on-going program-
ming, the software must ensure that the RWW section never is being read. If the user software is trying to
read code that is located inside the RWW section (i.e., by a call/jmp/lpm or an interrupt) during program-
ming, the software might end up in an unknown state. To avoid this, the interrupts should either be
disabled or moved to the Boot Loader section. The Boot Loader section is always located in the NRWW
section. The RWW Section Busy bit (RWWSB) in the Store Program Memory Control and Status Regis-
ter (SPMCSR) will be read as logical one as long as the RWW section is blocked for reading. After a
programming is completed, the RWWSB must be cleared by software before reading code located in the
RWW section.
details on how to clear RWWSB.
The code located in the NRWW section can be read when the Boot Loader software is updating a page in
the RWW section. When the Boot Loader code updates the NRWW section, the CPU is halted during the
entire Page Erase or Page Write operation.
Table 20-1.
Address During the Programming?
Which Section does the Z-pointer
NRWW Section
RWW Section
See “Store Program Memory Control and Status Register – SPMCSR” on page 238.
Read-While-Write Features
Which Section Can be
Programming?
NRWW Section
Read During
None
Is the CPU
Halted?
Yes
No
Read-While-Write
Supported?
7734P–AVR–08/10
Yes
No
for