AT90PWM161 Atmel Corporation, AT90PWM161 Datasheet - Page 227
AT90PWM161
Manufacturer Part Number
AT90PWM161
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT90PWM161.pdf
(325 pages)
Specifications of AT90PWM161
Flash (kbytes)
16 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
20
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
8
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM161-16MN
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT90PWM161-WN
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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18.2
18.3
7734P–AVR–08/10
Operation
Starting a Conversion
Figure 18-1.
The Digital to Analog Converter generates an analog signal proportional to the value of the DAC registers
value.
In order to have an accurate sampling frequency control, there is the possibility to update the DAC input
values through different trigger events.
The DAC is configured thanks to the DACON register. As soon as the DAEN bit in DACON register is
set, the DAC converts the value present on the DACH and DACL registers in accordance with the register
DACON setting.
Alternatively, a conversion can be triggered automatically by various sources. Auto Triggering is enabled
by setting the DAC Auto Trigger Enable bit, DAATE in DACON. The trigger source is selected by setting
the DAC Trigger Select bits, DATS in DACON (See description of the DATS bits for a list of the trigger
sources). When a positive edge occurs on the selected trigger signal, the DAC converts the value present
on the DACH and DACL registers in accordance with the register DACON setting. This provides a
method of starting conversions at fixed intervals. If the trigger signal is still set when the conversion com-
pletes, a new conversion will not be started. If another positive edge occurs on the trigger signal during
conversion, the edge will be ignored. Note that an interrupt flag will be set even if the specific interrupt is
Digital to Analog Converter Block Schematic
Detector
Edge
DAA TE
DAC High bits
VRef
DACH
DATS2
10
DATS1
Update D AC
T rigger
1
DAC
10
0
DATS0
10
DACON
DACL
DAC Lo w bits
-
DALA
Result
DAC
AT90PWM81
DAEN
227
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