ATtiny167 Atmel Corporation, ATtiny167 Datasheet - Page 90

• Manufacturer Part Number: ATtiny167
• Manufacturer: Atmel Corporation

Specifications of ATtiny167

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Depending on the mode of operation used, the counter is cleared, incremented, or decre-
mented at each timer clock (clk
0). clk
0 can be generated from an external or internal clock
T
T
source, selected by the Clock Select bits (CS0[2:0]). When no clock source is selected
(CS0[2:0] = 0) the timer is stopped. However, the TCNT0 value can be accessed by the CPU,
regardless of whether clk
0 is present or not. A CPU write overrides (has priority over) all
T
counter clear or count operations.
The counting sequence is determined by the setting of the WGM01 and WGM00 bits located
in the Timer/Counter Control Register (TCCR0A). There are close connections between how
the counter behaves (counts) and how waveforms are generated on the Output Compare out-
put OC0A. For more details about advanced counting sequences and waveform generation,
see
“Modes of Operation” on page
92.
The Timer/Counter Overflow Flag (TOV0) is set according to the mode of operation selected
by the WGM0[1:0] bits. TOV0 can be used for generating a CPU interrupt.
10.5
Output Compare Unit
The 8-bit comparator continuously compares TCNT0 with the Output Compare Register
(OCR0A). Whenever TCNT0 equals OCR0A, the comparator signals a match. A match will set
the Output Compare Flag (OCF0A) at the next timer clock cycle. If enabled (OCIE0A = 1), the
Output Compare Flag generates an Output Compare interrupt. The OCF0A flag is automati-
cally cleared when the interrupt is executed. Alternatively, the OCF0A flag can be cleared by
software by writing a logical one to its I/O bit location. The Waveform Generator uses the
match signal to generate an output according to operating mode set by the WGM0[1:0] bits
and Compare Output mode (COM0A[1:0]) bits. The max and bottom signals are used by the
Waveform Generator for handling the special cases of the extreme values in some modes of
operation
(“Modes of Operation” on page
92).
Figure 10-3
shows a block diagram of the Output Compare unit.
Figure 10-3. Output Compare Unit, Block Diagram
DATA BUS
OCRnx
TCNTn
=
(8-bit Comparator )
OCFnx (Int.Req.)
top
bottom
Waveform Generator
OCnx
FOCn
WGMn1:0
COMnX1:0
ATtiny87/ATtiny167
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8265B–AVR–09/10