ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 136

• Manufacturer Part Number: ATxmega64A1
• Manufacturer: Atmel Corporation

Specifications of ATxmega64A1

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 78
• Ext Interrupts: 78
• Usb Speed: No
• Usb Interface: No
• Spi: 12
• Twi (i2c): 4
• Uart: 8
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 8
• Output Compare Channels: 24
• Input Capture Channels: 24
• Pwm Channels: 24
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.8
13.9
8077H–AVR–12/09
Port Event
Alternate Port Functions
Table 13-3.
Port pins can generate an event when there is a change on the pin. The sense configurations
decide when each pin will generate events. Event generation requires the presence of a periph-
eral clock, hence asynchronous event generation is not possible. For edge sensing, the
changed pin value must be sampled once by the peripheral clock for an event to be generated.
A level sensing, a low level pin value will not generate events, and a high pin value will continu-
ously generate events. For events to be generated on low level, the pin configuration mst be set
to inverted I/O.
Most port pins have alternate pin functions in addition to being a general purpose I/O pin. When
an alternate function is enabled this might override the normal port pin function or pin value. This
happens when other peripherals that require pins are enabled or configured to use pins. If, and
how a peripheral will override and use pins is described in section for that peripheral.
The port override signals and related logic (grey) is shown in
signals are not accessible from software, but are internal signals between the overriding periph-
eral and the port pin.
Sense settings
Rising edge
Falling edge
Both edges
Low level
Limited asynchronous sense support
Supported
Yes
Yes
No
No
Interrupt description
-
-
Pin value must be kept unchanged.
Pin-level must be kept unchanged.
Figure 13-10 on page
XMEGA A
137. These
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