ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 264
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ATxmega64A1
Manufacturer Part Number
ATxmega64A1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A1
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A1-AU
Manufacturer:
Atmel
Quantity:
135
Company:
Part Number:
ATxmega64A1U-AU
Manufacturer:
ATMEL
Quantity:
953
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23.5
23.5.1
8077H–AVR–12/09
Register Description - AES
CTRL - AES Control Register
• Bit 7 - START: AES Start/Run
Setting this bit starts the encryption/decryption procedure, and this bit remains set while the
encryption/decryption is ongoing. Writing this bit to zero will stop/abort any ongoing encryp-
tion/decryption process. This bit is automatically cleared if the SRIF or the ERROR flag in
STATUS is set.
• Bit 6 - AUTO: AES Auto Start Trigger
Setting this bit enables the Auto Start mode. In Auto Start mode the START bit will trigger auto-
matically and start the encryption/decryption when the following conditions are met:
If not will the encryption/decryption be started with an incorrect Key.
• Bit 5 - RESET: AES Software Reset
Setting this bit will reset the AES Crypto Module to its initial status on the next positive edge of
the Peripheral Clock. All registers, pointers and memories in the module are set to their initial
value. When written to one, the bit stays high for one clock cycle before it is reset to zero by
hardware.
• Bit 4 - DECRYPT: AES Decryption / Direction
This bit sets the direction for the AES Crypto Module. Writing this bit to zero will set the module
in encryption mode. Writing one to this bit sets the module in decryption mode.
• Bit 3 - Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write
this bit to zero when this register is written.
• Bit 2 - XOR: AES State XOR Load Enable
Setting this bit enables XOR data load to the State memory. When this bit is set the data loaded
to the State memory is bitwise XOR'ed with current data in the State memory. Writing this bit to
zero disables XOR load mode, thus new data written to the State memory overwrites the current
data in the State memory.
Bit
+0x00
Read/Write
Initial Value
• The AUTO bit is set before the State memory is loaded.
• All memory pointers (State read/write and Key read/write) are zero.
• State memory is fully loaded.
START
R/W
7
0
AUTO
R/W
6
0
RESET
R/W
5
0
DECRYPT
R/W
4
0
R
3
0
-
XOR
R/W
2
0
R
1
0
-
XMEGA A
R
0
0
-
CTRL
264
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