ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 318
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ATxmega64A1
Manufacturer Part Number
ATxmega64A1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A1
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A1-AU
Manufacturer:
Atmel
Quantity:
135
Company:
Part Number:
ATxmega64A1U-AU
Manufacturer:
ATMEL
Quantity:
953
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26.3
26.4
26.5
8077H–AVR–12/09
Starting a conversion
Output channels
DAC Output model
Figure 26-1. DAC overview
Conversions are either done when data is written to the data registers, or timed by an incoming
event.
If auto trigger mode is not selected, a new conversion is automatically started when there is a
new value in the DAC data register. When auto trigger mode is selected, the new conversion will
be started on an incoming event from the selected event channel if there is new data in the data
register which has not been converted.
Both application software and the DMA controller may write to the data registers.
The output from the DAC can either be continuous to one pin (Channel 0), or fed into two differ-
ent pins using a sample and hold circuitry (S/H). With S/H these two outputs can act
independently and create two different analog signals, different in both voltage and frequency.
The two S/H outputs have individual data and conversion control registers. The DAC output may
be used as input to other peripherals in XMEGA, such as the Analog Comparator or the Analog
to Digital Converter. It is the output directly from the DAC, not the S/H outputs, that is available
for these peripherals.
Each DAC output channel has a driver buffer with feedback ensures that the voltage on the DAC
output pin is equal to the DACs internal voltage until the DAC output reaches its saturation volt-
age.
DAC characteristics in the device data sheet.
CH0DATA
CH1DATA
Figure 26-2 on page 319
12
12
Int. 1.00 V
AREFA
AREFB
AVCC
12
shows the DAC output model, for details on R
REFSEL
TRIG
CTRL
DAC
DAC
ENABLE
Control and Driver
ADC
AC
Output
XMEGA A
channel
, refer to the
DAC CH0
DAC CH1
318
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