SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 79

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SAM9263

Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9263

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
4.2
4.2.1
ARM DDI 0165B
Instruction interface
Instruction interface signals
The ARM9E-S requests instructions for execution using the instruction memory
interface. A new instruction is fetched over the instruction bus whenever an instruction
enters the Execute stage of the pipeline.
Instruction fetches take place in the Fetch stage of the pipeline.
The signals in the ARM9E-S instruction interface can be grouped into four categories:
Each of these signal groups shares a common timing relationship to the bus interface
cycle. All signals in the ARM9E-S instruction interface are generated from, or sampled
by, the rising edge of CLK.
You can extend bus cycles using the CLKEN signal (see Use of CLKEN to control bus
cycles on page 4-31). Unless otherwise stated CLKEN is permanently HIGH.
Clocking and clock control signals:
Address class signals:
Memory request signals:
Data timed signals:
Copyright © 2000 ARM Limited. All rights reserved.
CLK
CLKEN
nRESET.
IA[31:1]
ITBIT
InTRANS
InM[4:0].
InMREQ
ISEQ.
INSTR[31:0]
IABORT.
Memory Interface
4-3

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