STM32W108CC STMicroelectronics, STM32W108CC Datasheet - Page 10

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STM32W108CC

Manufacturer Part Number
STM32W108CC
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32W108CC

Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators

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Description
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Description
The STM32W108 is a fully integrated System-on-Chip that integrates a 2.4 GHz, IEEE
802.15.4-compliant transceiver, 32-bit ARM® Cortex™-M3 microprocessor, Flash and RAM
memory, and peripherals of use to designers of 802.15.4-based systems.
Figure 1.
The transceiver utilizes an efficient architecture that exceeds the dynamic range
requirements imposed by the IEEE 802.15.4-2003 standard by over 15 dB. The integrated
receive channel filtering allows for robust co-existence with other communication standards
in the 2.4 GHz spectrum, such as IEEE 802.11 and Bluetooth. The integrated regulator,
VCO, loop filter, and power amplifier keep the external component count low. An optional
high performance radio mode (boost mode) is software-selectable to boost dynamic range.
The integrated 32-bit ARM® Cortex™-M3 microprocessor is highly optimized for high
performance, low power consumption, and efficient memory utilization. Including an
integrated MPU, it supports two different modes of operation: Privileged mode and
Unprivileged mode. This architecture could be used to separate the networking stack from
the application code and prevent unwanted modification of restricted areas of memory and
registers resulting in increased stability and reliability of deployed solutions.
The STM32W108 has 128/192/256 Kbytes of embedded Flash memory and 8/12/16 Kbytes
of integrated RAM for data and program storage. The STM32W108 HAL software employs
an effective wear-leveling algorithm that optimizes the lifetime of the embedded Flash.
To maintain the strict timing requirements imposed by the ZigBee and IEEE 802.15.4-2003
standards, the STM32W108 integrates a number of MAC functions into the hardware. The
MAC hardware handles automatic ACK transmission and reception, automatic backoff
delay, and clear channel assessment for transmission, as well as automatic filtering of
RF_TX_ALT_P,N
VREG_OUT
nRESET
RF_P,N
BIAS_R
OSCA
OSCB
STM32W108 block diagram
PA select
HF crystal
Regulator
LF crystal
PA
OSC
POR
OSC
Bias
LNA
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
PA
Internal HF
Internal LF
RC-OSC
RC-OSC
Doc ID 16252 Rev 13
SYNTH
IF
Calibration
Purpose
General
ADC
DAC
ADC
ADC
PA[7:0], PB[7:0], PC[7:0]
GPIO multiplexor swtich
Packet Trace
Baseband
Packet sniffer
General
purpose
registers
SPI/I
MAC
UART/
timers
TX_ACTIVE
GPIO
+
2
C
Always
Powered
Domain
ARM CORTEX-M3
CPU debug
Data SRAM
TPIU/ITM/
FPB/DWT
CPU with NVIC
8 kBytes
12 kBytes
16 kBytes
Watchdog
manage r
and MPU
Chip
®
Wire and
Program Flash
debug
128 kBytes
192 kBytes
256 kBytes
Serial
JTAG
Sleep
timer
Encryption
controller
acclerator
Interrupt
2
nd
level
SWCLK,
JTCK

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