ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 128

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

8-bit timer (TIM8)
128/324
Figure 59. Timer block diagram
Whatever the timer mode used (input capture, output compare, one pulse mode or PWM
mode) an overflow occurs when the counter rolls over from FFh to 00h then:
●
●
If one of these conditions is false, the interrupt remains pending to be issued as soon as
they are both true.
Clearing the overflow interrupt request is done in two steps:
The TOF bit of the SR register is set.
A timer interrupt is generated if:
–
–
f
OSC2
TOIE bit of the CR1 register is set and
I bit of the CC register is cleared.
TIMER INTERRUPT
f
CPU
ICIE
ICF1
CC[1:0]
1/8000
OCIE TOIE
OCF1 TOF
1/2
1/4
1/8
(See note)
OVERFLOW
DETECT
CIRCUIT
FOLV2
ICF2
(Control/Status Register)
ALTERNATE
REGISTER
REGISTER
COUNTER
COUNTER
FOLV1
(Control Register 1) CR1
OCF2
Doc ID 12370 Rev 8
TIMD
OLVL2
8
OUTPUT COMPARE
8
IEDG1
0
CIRCUIT
REGISTER
COMPARE
CSR
OUTPUT
0
MCU-PERIPHERAL INTERFACE
TIMER INTERNAL BUS
OLVL1
Note: If IC, OC and TO interrupt requests have separate vectors
then the last OR is not present (See device Interrupt Vector Table)
1
6
ST7 INTERNAL BUS
8
8
OC1E
8
COMPARE
REGISTER
OUTPUT
OC2E OPM
2
8
REGISTER
EDGE DETECT
EDGE DETECT
CAPTURE
PWM
INPUT
CIRCUIT1
CIRCUIT2
1
8
CC1
(Control Register 2) CR2
LATCH1
LATCH2
8
CC0
REGISTER
CAPTURE
INPUT
IEDG2
2
8
ST72561-Auto
8
0
OCMP1
OCMP2
ICAP1
ICAP2
pin
pin
pin
pin