ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 45

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72561-Auto
5.5.5
5.6
5.6.1
The device RESET pin acts as an output that is pulled low when V
V
The LVD filters spikes on V
Internal watchdog reset
The RESET sequence generated by a internal Watchdog counter overflow is shown in
Figure
Starting from the Watchdog counter underflow, the device RESET pin acts as an output that
is pulled low during at least t
Figure 14. Reset sequences
System integrity management (SI)
The System Integrity Management block contains the Low Voltage Detector (LVD) and
Auxiliary Voltage Detector (AVD) functions. It is managed by the SICSR register.
Low voltage detector (LVD)
The Low Voltage Detector function (LVD) generates a static reset when the V
voltage is below a V
as the power-down keeping the ST7 in reset.
The V
for power-on in order to avoid a parasitic reset when the MCU starts running and sinks
current on the supply (hysteresis).
The LVD reset circuitry generates a reset when V
●
●
DD
< V
V
V
IT-(LVD)
IT+(LVD)
IT-(LVD)
14.
IT-
(falling edge) as shown in
WATCHDOG
RESET
EXTERNAL
RESET
SOURCE
RESET PIN
V
V
reference value for a voltage drop is lower than the V
when V
when V
IT+(LVD)
IT-(LVD)
IT-(LVD)
RUN
V
DD
DD
DD
is falling
is rising
reference value. This means that it secures the power-up as well
DD
ACTIVE PHASE
w(RSTL)out
larger than t
Doc ID 12370 Rev 8
RESET
LVD
Figure
.
g(VDD)
RUN
t
h(RSTL)in
14.
to avoid parasitic resets.
WATCHDOG UNDERFLOW
ACTIVE
PHASE
DD
EXTERNAL
RESET
Supply, reset and clock management
is below:
INTERNAL RESET (256 or 4096 T
VECTOR FETCH
RUN
ACTIVE
DD
PHASE
IT+(LVD)
WATCHDOG
RESET
t
w(RSTL)out
< V
IT+
reference value
RUN
(rising edge) or
DD
CPU
)
supply
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