ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 70

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

Power saving modes
Note:
70/324
1
2
3
4
Figure 30. AWUF halt timing diagram
Figure 31. AWUFH mode flow-chart
WDGHALT is an option bit. See option byte section for more details.
Peripheral clocked with an external clock source can still be active.
Only an AWUFH interrupt and some specific interrupts can exit the MCU from HALT mode
(such as external interrupt). Refer to
Before servicing an interrupt, the CC register is pushed on the stack. The I[1:0] bits of the
CC register are set to the current software priority level of the interrupt routine and
recovered when the CC register is popped.
AWUFH interrupt
f
f
AWU_RC
CPU
RUN MODE
(AWUCSR.AWUEN=1)
HALT INSTRUCTION
N
WATCHDOG
WDGHALT
Doc ID 12370 Rev 8
(MCCSR.OIE=0)
RESET
1
INTERRUPT
HALT MODE
Y
Table 16
t
1)
AWU
ENABLE
3)
256 OR 4096 CPU CLOCK
OR SERVICE INTERRUPT
0
FETCH RESET VECTOR
AWU RC OSC
MAIN OSC
PERIPHERALS
CPU
AWU RC OSC
MAIN OSC
PERIPHERALS
CPU
MAIN OSC
PERIPHERALS
CPU
I[1:0] BITS
I[1:0] BITS
AWU RC OSC
I[1:0] BITS
for more details.
N
CYCLE
RESET
WATCHDOG
Y
256 or 4096 t
DELAY
DISABLE
2)
XX
XX
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
10
4)
4)
CPU
RUN MODE
ST72561-Auto
Clear
by software